dmaengine: mv_xor_v2: Fix -Wshift-negative-value (698f7a9b) · Commits · 戴 / test

Clang produces the following warning drivers/dma/mv_xor_v2.c:264:40: warning: shifting a negative signed value is undefined [-Wshift-negative-value] reg &= (~MV_XOR_V2_DMA_IMSG_THRD_MASK << MV_XOR_V2_DMA_IMSG_THRD_SHIFT); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ drivers/dma/mv_xor_v2.c:271:46: warning: shifting a negative signed value is undefined [-Wshift-negative-value] reg &= (~MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK << ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ Upon further investigation MV_XOR_V2_DMA_IMSG_THRD_SHIFT and MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT are both 0. Since shifting by 0 does nothing, these variables can be removed. Cc: clang-built-linux@googlegroups.com Link: https://github.com/ClangBuiltLinux/linux/issues/521 Signed-off-by:

Nathan Huckleberry <nhuck@google.com> Reviewed-by:

Nick Desaulniers <ndesaulniers@google.com> Link: https://lore.kernel.org/r/20190813173448.109859-1-nhuck@google.com Signed-off-by:

Vinod Koul <vkoul@kernel.org>

drivers/dma/mv_xor_v2.c

+4 −7

Original line number	Diff line number	Diff line
		@@ -33,7 +33,6 @@
		#define MV_XOR_V2_DMA_IMSG_CDAT_OFF 0x014
		#define MV_XOR_V2_DMA_IMSG_THRD_OFF 0x018
		#define MV_XOR_V2_DMA_IMSG_THRD_MASK 0x7FFF
		#define MV_XOR_V2_DMA_IMSG_THRD_SHIFT 0x0
		#define MV_XOR_V2_DMA_IMSG_TIMER_EN BIT(18)
		#define MV_XOR_V2_DMA_DESQ_AWATTR_OFF 0x01C
		/* Same flags as MV_XOR_V2_DMA_DESQ_ARATTR_OFF */
		@@ -50,7 +49,6 @@
		#define MV_XOR_V2_DMA_DESQ_ADD_OFF 0x808
		#define MV_XOR_V2_DMA_IMSG_TMOT 0x810
		#define MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK 0x1FFF
		#define MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT 0

		/* XOR Global registers */
		#define MV_XOR_V2_GLOB_BW_CTRL 0x4
		@@ -261,16 +259,15 @@ void mv_xor_v2_enable_imsg_thrd(struct mv_xor_v2_device *xor_dev)

		/* Configure threshold of number of descriptors, and enable timer */
		reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF);
		reg &= (~MV_XOR_V2_DMA_IMSG_THRD_MASK << MV_XOR_V2_DMA_IMSG_THRD_SHIFT);
		reg \|= (MV_XOR_V2_DONE_IMSG_THRD << MV_XOR_V2_DMA_IMSG_THRD_SHIFT);
		reg &= ~MV_XOR_V2_DMA_IMSG_THRD_MASK;
		reg \|= MV_XOR_V2_DONE_IMSG_THRD;
		reg \|= MV_XOR_V2_DMA_IMSG_TIMER_EN;
		writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF);

		/* Configure Timer Threshold */
		reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT);
		reg &= (~MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK <<
		MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT);
		reg \|= (MV_XOR_V2_TIMER_THRD << MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT);
		reg &= ~MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK;
		reg \|= MV_XOR_V2_TIMER_THRD;
		writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT);
		}

Admin message