Commit 689e349a authored by Andrey Smirnov's avatar Andrey Smirnov Committed by Lorenzo Pieralisi
Browse files

PCI: dwc: Share code for dw_pcie_rd/wr_other_conf() 



Default implementation of pcie_rd_other_conf() and
dw_pcie_wd_other_conf() share more than 80% of their code. Move shared
code into a dedicated subroutine and convert pcie_rd_other_conf() and
dw_pcie_wd_other_conf() to use it. No functional change intended.

Signed-off-by: default avatarAndrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarGustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
parent 4f8bbd2f

drivers/pci/controller/dwc/pcie-designware-host.c

+23 −38
Original line number Diff line number Diff line
@@ -512,8 +512,9 @@ error: 
	return ret;

}



static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,

				 u32 devfn, int where, int size, u32 *val)

static int dw_pcie_access_other_conf(struct pcie_port *pp, struct pci_bus *bus,

				     u32 devfn, int where, int size, u32 *val,

				     bool write)

{

	int ret, type;

	u32 busdev, cfg_size;
@@ -521,9 +522,6 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, 
	void __iomem *va_cfg_base;

	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);



	if (pp->ops->rd_other_conf)

		return pp->ops->rd_other_conf(pp, bus, devfn, where, size, val);



	busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) |

		 PCIE_ATU_FUNC(PCI_FUNC(devfn));
@@ -542,7 +540,11 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, 
	dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1,

				  type, cpu_addr,

				  busdev, cfg_size);

	if (write)

		ret = dw_pcie_write(va_cfg_base + where, size, *val);

	else

		ret = dw_pcie_read(va_cfg_base + where, size, val);



	if (pci->num_viewport <= 2)

		dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1,

					  PCIE_ATU_TYPE_IO, pp->io_base,
@@ -551,43 +553,26 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, 
	return ret;

}



static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus,

				 u32 devfn, int where, int size, u32 val)

static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,

				 u32 devfn, int where, int size, u32 *val)

{

	int ret, type;

	u32 busdev, cfg_size;

	u64 cpu_addr;

	void __iomem *va_cfg_base;

	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);



	if (pp->ops->wr_other_conf)

		return pp->ops->wr_other_conf(pp, bus, devfn, where, size, val);



	busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) |

		 PCIE_ATU_FUNC(PCI_FUNC(devfn));

	if (pp->ops->rd_other_conf)

		return pp->ops->rd_other_conf(pp, bus, devfn, where,

					      size, val);



	if (bus->parent->number == pp->root_bus_nr) {

		type = PCIE_ATU_TYPE_CFG0;

		cpu_addr = pp->cfg0_base;

		cfg_size = pp->cfg0_size;

		va_cfg_base = pp->va_cfg0_base;

	} else {

		type = PCIE_ATU_TYPE_CFG1;

		cpu_addr = pp->cfg1_base;

		cfg_size = pp->cfg1_size;

		va_cfg_base = pp->va_cfg1_base;

	return dw_pcie_access_other_conf(pp, bus, devfn, where, size, val,

					 false);

}



	dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1,

				  type, cpu_addr,

				  busdev, cfg_size);

	ret = dw_pcie_write(va_cfg_base + where, size, val);

	if (pci->num_viewport <= 2)

		dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1,

					  PCIE_ATU_TYPE_IO, pp->io_base,

					  pp->io_bus_addr, pp->io_size);

static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus,

				 u32 devfn, int where, int size, u32 val)

{

	if (pp->ops->wr_other_conf)

		return pp->ops->wr_other_conf(pp, bus, devfn, where,

					      size, val);



	return ret;

	return dw_pcie_access_other_conf(pp, bus, devfn, where, size, &val,

					 true);

}



static int dw_pcie_valid_device(struct pcie_port *pp, struct pci_bus *bus,

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