Commit 687e79c0 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
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drm/amdgpu: correct the cu and rb info for sienna cichlid 



Skip disabled sa to correct the cu_info and active_rbs for sienna cichlid.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.9.x
parent 0435d77c

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+9 −0
Original line number Diff line number Diff line
@@ -4582,12 +4582,17 @@ static void gfx_v10_0_setup_rb(struct amdgpu_device *adev) 
	int i, j;

	u32 data;

	u32 active_rbs = 0;

	u32 bitmap;

	u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se /

					adev->gfx.config.max_sh_per_se;



	mutex_lock(&adev->grbm_idx_mutex);

	for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {

		for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {

			bitmap = i * adev->gfx.config.max_sh_per_se + j;

			if ((adev->asic_type == CHIP_SIENNA_CICHLID) &&

			    ((gfx_v10_3_get_disabled_sa(adev) >> bitmap) & 1))

				continue;

			gfx_v10_0_select_se_sh(adev, i, j, 0xffffffff);

			data = gfx_v10_0_get_rb_active_bitmap(adev);

			active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) *
@@ -8812,6 +8817,10 @@ static int gfx_v10_0_get_cu_info(struct amdgpu_device *adev, 
	mutex_lock(&adev->grbm_idx_mutex);

	for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {

		for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {

			bitmap = i * adev->gfx.config.max_sh_per_se + j;

			if ((adev->asic_type == CHIP_SIENNA_CICHLID) &&

			    ((gfx_v10_3_get_disabled_sa(adev) >> bitmap) & 1))

				continue;

			mask = 1;

			ao_bitmap = 0;

			counter = 0;

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