Commit 682c1e52 authored Oct 15, 2016 by Paul Burton Committed by Ralf Baechle Nov 04, 2016

MIPS: CPC: Provide default mips_cpc_default_phys_base to ignore CPC



Provide a default implementation of mips_cpc_default_phys_base() which
simply returns 0, and adjust mips_cpc_phys_base() to allow for
mips_cpc_default_phys_base() returning 0. This allows kernels which
include CPC support to be built without platform code & simply ignore
the CPC if it wasn't already enabled by the bootloader.

This fixes link failures such as the following from generic defconfigs:

   arch/mips/built-in.o: In function `mips_cpc_phys_base':
   arch/mips/kernel/mips-cpc.c:47: undefined reference to `mips_cpc_default_phys_base'

[ralf@linux-mips.org: changed prototype for coding style compliance.]

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14401/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent a909d3e6

arch/mips/kernel/mips-cpc.c

+10 −1

Original line number	Diff line number	Diff line
		@@ -21,6 +21,11 @@ static DEFINE_PER_CPU_ALIGNED(spinlock_t, cpc_core_lock);

		static DEFINE_PER_CPU_ALIGNED(unsigned long, cpc_core_lock_flags);

		phys_addr_t __weak mips_cpc_default_phys_base(void)
		{
		return 0;
		}

		/**
		* mips_cpc_phys_base - retrieve the physical base address of the CPC
		*
		@@ -43,8 +48,12 @@ static phys_addr_t mips_cpc_phys_base(void)
		if (cpc_base & CM_GCR_CPC_BASE_CPCEN_MSK)
		return cpc_base & CM_GCR_CPC_BASE_CPCBASE_MSK;

		/* Otherwise, give it the default address & enable it */
		/* Otherwise, use the default address */
		cpc_base = mips_cpc_default_phys_base();
		if (!cpc_base)
		return cpc_base;

		/* Enable the CPC, mapped at the default address */
		write_gcr_cpc_base(cpc_base \| CM_GCR_CPC_BASE_CPCEN_MSK);
		return cpc_base;
		}

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