drm/amd/powerplay: partial revert commit 01b0e7fb1. (68260f34) · Commits · 戴 / test

when uvd is idle, we gate uvd clock. and uvd is busy, we ungate uvd clock. Reviewed-by:

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -149,7 +149,7 @@ int smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
		if (bgate) {
		cgs_set_clockgating_state(hwmgr->device,
		AMD_IP_BLOCK_TYPE_UVD,
		AMD_CG_STATE_UNGATE);
		AMD_CG_STATE_GATE);
		cgs_set_powergating_state(hwmgr->device,
		AMD_IP_BLOCK_TYPE_UVD,
		AMD_PG_STATE_GATE);
		@@ -162,7 +162,7 @@ int smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
		AMD_CG_STATE_UNGATE);
		cgs_set_clockgating_state(hwmgr->device,
		AMD_IP_BLOCK_TYPE_UVD,
		AMD_CG_STATE_GATE);
		AMD_CG_STATE_UNGATE);
		smu7_update_uvd_dpm(hwmgr, false);
		}