Commit 67d4119c authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Refactor to common helpers for prepare/finish between reset & wedge 



Since both GPU reset and declaring the device wedged suspend ongoing
driver activity around a hard reset, we can reuse the same code to
reduce the likelihood of forgetting details surrounding reset from
either path.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Reviewed-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314084432.3740-1-chris@chris-wilson.co.uk
parent d2eeaf2b

drivers/gpu/drm/i915/i915_reset.c

+11 −9
Original line number Diff line number Diff line
@@ -681,6 +681,10 @@ static void reset_prepare(struct drm_i915_private *i915) 
		reset_prepare_engine(engine);



	intel_uc_reset_prepare(i915);

}



static void gt_revoke(struct drm_i915_private *i915)

{

	revoke_mmaps(i915);

}
@@ -756,8 +760,10 @@ static void reset_finish(struct drm_i915_private *i915) 
	struct intel_engine_cs *engine;

	enum intel_engine_id id;



	for_each_engine(engine, i915, id)

	for_each_engine(engine, i915, id) {

		reset_finish_engine(engine);

		intel_engine_signal_breadcrumbs(engine);

	}

}



static void reset_restart(struct drm_i915_private *i915)
@@ -823,10 +829,7 @@ static void __i915_gem_set_wedged(struct drm_i915_private *i915) 
	 * rolling the global seqno forward (since this would complete requests

	 * for which we haven't set the fence error to EIO yet).

	 */

	for_each_engine(engine, i915, id)

		reset_prepare_engine(engine);



	intel_uc_reset_prepare(i915);

	reset_prepare(i915);



	/* Even if the GPU reset fails, it should still stop the engines */

	if (!INTEL_INFO(i915)->gpu_reset_clobbers_display)
@@ -849,10 +852,7 @@ static void __i915_gem_set_wedged(struct drm_i915_private *i915) 
	for_each_engine(engine, i915, id)

		engine->cancel_requests(engine);



	for_each_engine(engine, i915, id) {

		reset_finish_engine(engine);

		intel_engine_signal_breadcrumbs(engine);

	}

	reset_finish(i915);



	smp_mb__before_atomic();

	set_bit(I915_WEDGED, &error->flags);
@@ -949,6 +949,8 @@ static int do_reset(struct drm_i915_private *i915, unsigned int stalled_mask) 
{

	int err, i;



	gt_revoke(i915);



	err = intel_gpu_reset(i915, ALL_ENGINES);

	for (i = 0; err && i < RESET_MAX_RETRIES; i++) {

		msleep(10 * (i + 1));

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