Commit 67c88008 authored by Boris Brezillon's avatar Boris Brezillon Committed by Miquel Raynal
Browse files

mtd: rawnand: sunxi: Fix kernel doc headers 



Fix the struct description and use standard kernel-doc header format
(even if the file is not parsed by the doc generator).

We also replace tabs by a single space.

Signed-off-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
parent df505799

drivers/mtd/nand/raw/sunxi_nand.c

+30 −30
Original line number Diff line number Diff line
@@ -154,20 +154,19 @@ 


#define NFC_MAX_CS		7



/*

 * Chip Select structure: stores information related to NAND Chip Select

/**

 * struct sunxi_nand_chip_sel - stores information related to NAND Chip Select

 *

 * @cs: the NAND CS id used to communicate with a NAND Chip

 * @rb:		the Ready/Busy pin ID. -1 means no R/B pin connected to the

 *		NFC

 * @rb: the Ready/Busy pin ID. -1 means no R/B pin connected to the NFC

 */

struct sunxi_nand_chip_sel {

	u8 cs;

	s8 rb;

};



/*

 * sunxi HW ECC infos: stores information related to HW ECC support

/**

 * struct sunxi_nand_hw_ecc - stores information related to HW ECC support

 *

 * @mode: the sunxi ECC mode field deduced from ECC requirements

 */
@@ -175,14 +174,14 @@ struct sunxi_nand_hw_ecc { 
	int mode;

};



/*

 * NAND chip structure: stores NAND chip device related information

/**

 * struct sunxi_nand_chip - stores NAND chip device related information

 *

 * @node: used to store NAND chips into a list

 * @nand: base NAND chip structure

 * @mtd:		base MTD structure

 * @clk_rate: clk_rate required for this NAND chip

 * @timing_cfg		TIMING_CFG register value for this NAND chip

 * @timing_cfg: TIMING_CFG register value for this NAND chip

 * @timing_ctl: TIMING_CTL register value for this NAND chip

 * @nsels: number of CS lines required by the NAND chip

 * @sels: array of CS lines descriptions

 */
@@ -201,20 +200,21 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) 
	return container_of(nand, struct sunxi_nand_chip, nand);

}



/*

 * NAND Controller structure: stores sunxi NAND controller information

/**

 * struct sunxi_nfc - stores sunxi NAND controller information

 *

 * @controller: base controller structure

 * @dev: parent device (used to print error messages)

 * @regs: NAND controller registers

 * @ahb_clk:		NAND Controller AHB clock

 * @mod_clk:		NAND Controller mod clock

 * @ahb_clk: NAND controller AHB clock

 * @mod_clk: NAND controller mod clock

 * @reset: NAND controller reset line

 * @assigned_cs: bitmask describing already assigned CS lines

 * @clk_rate: NAND controller current clock rate

 * @chips:		a list containing all the NAND chips attached to

 *			this NAND controller

 * @complete:		a completion object used to wait for NAND

 *			controller events

 * @chips: a list containing all the NAND chips attached to this NAND

 *	   controller

 * @complete: a completion object used to wait for NAND controller events

 * @dmac: the DMA channel attached to the NAND controller

 */

struct sunxi_nfc {

	struct nand_controller controller;

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