Commit 67bcc9ad authored by Saheed O. Bolarinwa's avatar Saheed O. Bolarinwa Committed by Bjorn Helgaas
Browse files

PCI/ASPM: Remove struct aspm_register_info.enabled 

Previously we stored the "ASPM Control" bits from the Link Control register
in the struct aspm_register_info.

Read PCI_EXP_LNKCTL directly when needed.  This means we can use the
PCI_EXP_LNKCTL_ASPM_* bits directly instead of the similar but different
PCIE_LINK_STATE_* bits.  No functional change intended.

[bhelgaas: drop get_aspm_enable() and read LNKCTL once directly]
Link: https://lore.kernel.org/r/20201015193039.12585-6-helgaas@kernel.org


Signed-off-by: default avatarSaheed O. Bolarinwa <refactormyself@gmail.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent c6e5f02b

drivers/pci/pcie/aspm.c

+6 −8
Original line number Diff line number Diff line
@@ -381,10 +381,8 @@ static void encode_l12_threshold(u32 threshold_us, u32 *scale, u32 *value) 
}



struct aspm_register_info {

	u32 enabled:2;

	u32 latency_encoding_l0s;

	u32 latency_encoding_l1;



	/* L1 substates */

	u32 l1ss_cap_ptr;

	u32 l1ss_cap;
@@ -395,14 +393,11 @@ struct aspm_register_info { 
static void pcie_get_aspm_reg(struct pci_dev *pdev,

			      struct aspm_register_info *info)

{

	u16 reg16;

	u32 reg32;



	pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &reg32);

	info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12;

	info->latency_encoding_l1  = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15;

	pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &reg16);

	info->enabled = reg16 & PCI_EXP_LNKCTL_ASPMC;



	/* Read L1 PM substate capabilities */

	info->l1ss_cap = info->l1ss_ctl1 = info->l1ss_ctl2 = 0;
@@ -549,6 +544,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) 
{

	struct pci_dev *child = link->downstream, *parent = link->pdev;

	u32 parent_lnkcap, child_lnkcap;

	u16 parent_lnkctl, child_lnkctl;

	struct pci_bus *linkbus = parent->subordinate;

	struct aspm_register_info upreg, dwreg;
@@ -579,6 +575,8 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) 
	 */

	pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &parent_lnkcap);

	pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &child_lnkcap);

	pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &parent_lnkctl);

	pcie_capability_read_word(child, PCI_EXP_LNKCTL, &child_lnkctl);

	pcie_get_aspm_reg(parent, &upreg);

	pcie_get_aspm_reg(child, &dwreg);
@@ -592,9 +590,9 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) 
	if (parent_lnkcap & child_lnkcap & PCI_EXP_LNKCAP_ASPM_L0S)

		link->aspm_support |= ASPM_STATE_L0S;



	if (dwreg.enabled & PCIE_LINK_STATE_L0S)

	if (child_lnkctl & PCI_EXP_LNKCTL_ASPM_L0S)

		link->aspm_enabled |= ASPM_STATE_L0S_UP;

	if (upreg.enabled & PCIE_LINK_STATE_L0S)

	if (parent_lnkctl & PCI_EXP_LNKCTL_ASPM_L0S)

		link->aspm_enabled |= ASPM_STATE_L0S_DW;

	link->latency_up.l0s = calc_l0s_latency(upreg.latency_encoding_l0s);

	link->latency_dw.l0s = calc_l0s_latency(dwreg.latency_encoding_l0s);
@@ -603,7 +601,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) 
	if (parent_lnkcap & child_lnkcap & PCI_EXP_LNKCAP_ASPM_L1)

		link->aspm_support |= ASPM_STATE_L1;



	if (upreg.enabled & dwreg.enabled & PCIE_LINK_STATE_L1)

	if (parent_lnkctl & child_lnkctl & PCI_EXP_LNKCTL_ASPM_L1)

		link->aspm_enabled |= ASPM_STATE_L1;

	link->latency_up.l1 = calc_l1_latency(upreg.latency_encoding_l1);

	link->latency_dw.l1 = calc_l1_latency(dwreg.latency_encoding_l1);

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