Commit 6781002b authored by Andrew Victor's avatar Andrew Victor Committed by Russell King
Browse files

[ARM] 5287/2: [AT91] Configuration of Static Memory Controller 



Add a structure 'sam9_smc_config' and function sam9_smc_configure() to
allow the board-specific files to specify the configuration of the
Static Memory Controller per chip-select.  This allows the board file
to specify timings for NAND flash, NOR flash or other external
peripherals.

This functionality can be used for all the SAM9 and CAP9 processors.
(the AT91RM9200 has a different memory-controller)
This patch is based on similar code in the AVR32 architecture.

Signed-off-by: default avatarAndrew Victor <linux@maxim.org.za>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 37efe642

arch/arm/mach-at91/Makefile

+6 −6
Original line number Diff line number Diff line
@@ -11,12 +11,12 @@ obj-$(CONFIG_AT91_PMC_UNIT) += clock.o 


# CPU-specific support

obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o at91rm9200_devices.o

obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o

obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o

obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o

obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o

obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o

obj-$(CONFIG_ARCH_AT91CAP9)	+= at91cap9.o at91sam926x_time.o at91cap9_devices.o

obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o

obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o

obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o

obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o

obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o  sam9_smc.o

obj-$(CONFIG_ARCH_AT91CAP9)	+= at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o

obj-$(CONFIG_ARCH_AT91X40)	+= at91x40.o at91x40_time.o



# AT91RM9200 board-specific support

arch/arm/mach-at91/sam9_smc.c

0 → 100644
+47 −0
Original line number Diff line number Diff line 
/*

 * linux/arch/arm/mach-at91/sam9_smc.c

 *

 * Copyright (C) 2008 Andrew Victor

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <linux/module.h>

#include <linux/io.h>



#include <mach/at91sam9_smc.h>



#include "sam9_smc.h"



void __init sam9_smc_configure(int cs, struct sam9_smc_config* config)

{

	/* Setup register */

	at91_sys_write(AT91_SMC_SETUP(cs),

		  AT91_SMC_NWESETUP_(config->nwe_setup)

		| AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)

		| AT91_SMC_NRDSETUP_(config->nrd_setup)

		| AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup)

	);



	/* Pulse register */

	at91_sys_write(AT91_SMC_PULSE(cs),

		  AT91_SMC_NWEPULSE_(config->nwe_pulse)

		| AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)

                | AT91_SMC_NRDPULSE_(config->nrd_pulse)

		| AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse)

	);



	/* Cycle register */

	at91_sys_write(AT91_SMC_CYCLE(cs),

		  AT91_SMC_NWECYCLE_(config->write_cycle)

		| AT91_SMC_NRDCYCLE_(config->read_cycle)

	);



	/* Mode register */

	at91_sys_write(AT91_SMC_MODE(cs),

		  config->mode

		| AT91_SMC_TDF_(config->tdf_cycles)

	);

}

arch/arm/mach-at91/sam9_smc.h

0 → 100644
+33 −0
Original line number Diff line number Diff line 
/*

 * linux/arch/arm/mach-at91/sam9_smc.

 *

 * Copyright (C) 2008 Andrew Victor

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



struct sam9_smc_config {

	/* Setup register */

	u8 ncs_read_setup;

	u8 nrd_setup;

	u8 ncs_write_setup;

	u8 nwe_setup;



	/* Pulse register */

	u8 ncs_read_pulse;

	u8 nrd_pulse;

	u8 ncs_write_pulse;

	u8 nwe_pulse;



	/* Cycle register */

	u16 read_cycle;

	u16 write_cycle;



	/* Mode register */

	u32 mode;

	u8 tdf_cycles:4;

};



extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config);

CRA Git | Maintained and supported by SUSTech CRA and CCSE