Commit 6743e817 authored Mar 16, 2018 by Thinh Nguyen Committed by Felipe Balbi Mar 22, 2018

usb: dwc3: Add DWC_usb31 GTXTHRCFG reg fields



Add new GTXTHRCFG bit field macros for DWC_usb31. The GTXTHRCFG register
fields for DWC_usb31 is as follows:
 +-------+--------------------------+-----------------------------------+
 | BITS  | Name                     | Description                       |
 +=======+==========================+===================================+
 | 31:27 | reserved                 |                                   |
 | 26    | UsbTxPktCntSel           | Async ESS transmit packet         |
 |       |                          | threshold enable                  |
 | 25:21 | UsbTxPktCnt              | Async ESS transmit packet         |
 |       |                          | threshold count                   |
 | 20:16 | UsbMaxTxBurstSize        | Async ESS Max transmit burst size |
 | 15    | UsbTxThrNumPktSel_HS_Prd | HS high bandwidth periodic        |
 |       |                          | transmit packet threshold enable  |
 | 14:13 | UsbTxThrNumPkt_HS_Prd    | HS high bandwidth periodic        |
 |       |                          | transmit packet threshold count   |
 | 12:11 | reserved                 |                                   |
 | 10    | UsbTxThrNumPktSel_Prd    | Periodic ESS transmit packet      |
 |       |                          | threshold enable                  |
 | 9:5   | UsbTxThrNumPkt_Prd       | Periodic ESS transmit packet      |
 |       |                          | threshold count                   |
 | 4:0   | UsbMaxTxBurstSize_Prd    | Max periodic ESS TX burst size    |
 +-------+--------------------------+-----------------------------------+

Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>

parent 01b0e2cc

drivers/usb/dwc3/core.h

+10 −0

Original line number	Diff line number	Diff line
		@@ -188,6 +188,16 @@
		#define DWC31_RXTHRNUMPKT_PRD(n) (((n) & 0x1f) << 5)
		#define DWC31_MAXRXBURSTSIZE_PRD(n) ((n) & 0x1f)

		/* Global TX Threshold Configuration Register for DWC_usb31 only */
		#define DWC31_GTXTHRCFG_MAXTXBURSTSIZE(n) (((n) & 0x1f) << 16)
		#define DWC31_GTXTHRCFG_TXPKTCNT(n) (((n) & 0x1f) << 21)
		#define DWC31_GTXTHRCFG_PKTCNTSEL BIT(26)
		#define DWC31_TXTHRNUMPKTSEL_HS_PRD BIT(15)
		#define DWC31_TXTHRNUMPKT_HS_PRD(n) (((n) & 0x3) << 13)
		#define DWC31_TXTHRNUMPKTSEL_PRD BIT(10)
		#define DWC31_TXTHRNUMPKT_PRD(n) (((n) & 0x1f) << 5)
		#define DWC31_MAXTXBURSTSIZE_PRD(n) ((n) & 0x1f)

		/* Global Configuration Register */
		#define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
		#define DWC3_GCTL_U2RSTECN BIT(16)

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