exynos/dsim: add DT bindings

Exynos MIPI DSI Master

Required properties:

  - compatible: "samsung,exynos4210-mipi-dsi"

  - reg: physical base address and length of the registers set for the device

  - interrupts: should contain DSI interrupt

  - clocks: list of clock specifiers, must contain an entry for each required

    entry in clock-names

  - clock-names: should include "bus_clk"and "pll_clk" entries

  - phys: list of phy specifiers, must contain an entry for each required

    entry in phy-names

  - phy-names: should include "dsim" entry

  - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)

  - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)

  - samsung,pll-clock-frequency: specifies frequency of the "pll_clk" clock

  - #address-cells, #size-cells: should be set respectively to <1> and <0>

    according to DSI host bindings (see MIPI DSI bindings [1])

Optional properties:

  - samsung,power-domain: a phandle to DSIM power domain node

Child nodes:

  Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).

Video interfaces:

  Device node can contain video interface port nodes according to [2].

  The following are properties specific to those nodes:

  port node:

    - reg: (required) can be 0 for input RGB/I80 port or 1 for DSI port;

  endpoint node of DSI port (reg = 1):

    - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst

      mode

    - samsung,esc-clock-frequency: specifies DSI frequency in escape mode

[1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt

[2]: Documentation/devicetree/bindings/media/video-interfaces.txt

Example:

	dsi@11C80000 {

		compatible = "samsung,exynos4210-mipi-dsi";

		reg = <0x11C80000 0x10000>;

		interrupts = <0 79 0>;

		clocks = <&clock 286>, <&clock 143>;

		clock-names = "bus_clk", "pll_clk";

		phys = <&mipi_phy 1>;

		phy-names = "dsim";

		vddcore-supply = <&vusb_reg>;

		vddio-supply = <&vmipi_reg>;

		samsung,power-domain = <&pd_lcd0>;

		#address-cells = <1>;

		#size-cells = <0>;

		samsung,pll-clock-frequency = <24000000>;

		panel@1 {

			reg = <0>;

			...

			port {

				panel_ep: endpoint {

					remote-endpoint = <&dsi_ep>;

				};

			};

		};

		ports {

			#address-cells = <1>;

			#size-cells = <0>;

			port@1 {

				dsi_ep: endpoint {

					reg = <0>;

					samsung,burst-clock-frequency = <500000000>;

					samsung,esc-clock-frequency = <20000000>;

					remote-endpoint = <&panel_ep>;

				};

			};

		};

	};