Commit 66ee1973 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'sh-pfc-for-v5.5-tag1' of... 

Merge tag 'sh-pfc-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v5.5

  - Add support for the new RZ/G2N (r8a774b1) SoC,
  - Small fixes and cleanups.
parents fa679767 f846d1e7

Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ Required Properties: 
    - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.

    - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller.

    - "renesas,pfc-r8a774a1": for R8A774A1 (RZ/G2M) compatible pin-controller.

    - "renesas,pfc-r8a774b1": for R8A774B1 (RZ/G2N) compatible pin-controller.

    - "renesas,pfc-r8a774c0": for R8A774C0 (RZ/G2E) compatible pin-controller.

    - "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.

    - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.

drivers/pinctrl/pinctrl-rza2.c

+2 −2
Original line number Diff line number Diff line
@@ -213,8 +213,8 @@ static const char * const rza2_gpio_names[] = { 
	"PC_0", "PC_1", "PC_2", "PC_3", "PC_4", "PC_5", "PC_6", "PC_7",

	"PD_0", "PD_1", "PD_2", "PD_3", "PD_4", "PD_5", "PD_6", "PD_7",

	"PE_0", "PE_1", "PE_2", "PE_3", "PE_4", "PE_5", "PE_6", "PE_7",

	"PF_0", "PF_1", "PF_2", "PF_3", "P0_4", "PF_5", "PF_6", "PF_7",

	"PG_0", "PG_1", "PG_2", "P0_3", "PG_4", "PG_5", "PG_6", "PG_7",

	"PF_0", "PF_1", "PF_2", "PF_3", "PF_4", "PF_5", "PF_6", "PF_7",

	"PG_0", "PG_1", "PG_2", "PG_3", "PG_4", "PG_5", "PG_6", "PG_7",

	"PH_0", "PH_1", "PH_2", "PH_3", "PH_4", "PH_5", "PH_6", "PH_7",

	/* port I does not exist */

	"PJ_0", "PJ_1", "PJ_2", "PJ_3", "PJ_4", "PJ_5", "PJ_6", "PJ_7",

drivers/pinctrl/pinctrl-rzn1.c

+1 −1
Original line number Diff line number Diff line
@@ -487,7 +487,7 @@ static int rzn1_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 
{

	struct rzn1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);

	enum pin_config_param param = pinconf_to_config_param(*config);

	const u32 reg_drive[4] = { 4, 6, 8, 12 };

	static const u32 reg_drive[4] = { 4, 6, 8, 12 };

	u32 pull, drive, l1mux;

	u32 l1, l2, arg = 0;

drivers/pinctrl/sh-pfc/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ config PINCTRL_SH_PFC 
	select PINCTRL_PFC_R8A7745 if ARCH_R8A7745

	select PINCTRL_PFC_R8A77470 if ARCH_R8A77470

	select PINCTRL_PFC_R8A774A1 if ARCH_R8A774A1

	select PINCTRL_PFC_R8A774B1 if ARCH_R8A774B1

	select PINCTRL_PFC_R8A774C0 if ARCH_R8A774C0

	select PINCTRL_PFC_R8A7778 if ARCH_R8A7778

	select PINCTRL_PFC_R8A7779 if ARCH_R8A7779
@@ -86,6 +87,9 @@ config PINCTRL_PFC_R8A77470 
config PINCTRL_PFC_R8A774A1

	bool "RZ/G2M pin control support" if COMPILE_TEST



config PINCTRL_PFC_R8A774B1

	bool "RZ/G2N pin control support" if COMPILE_TEST



config PINCTRL_PFC_R8A774C0

	bool "RZ/G2E pin control support" if COMPILE_TEST

drivers/pinctrl/sh-pfc/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7744) += pfc-r8a7791.o 
obj-$(CONFIG_PINCTRL_PFC_R8A7745)	+= pfc-r8a7794.o

obj-$(CONFIG_PINCTRL_PFC_R8A77470)	+= pfc-r8a77470.o

obj-$(CONFIG_PINCTRL_PFC_R8A774A1)	+= pfc-r8a7796.o

obj-$(CONFIG_PINCTRL_PFC_R8A774B1)	+= pfc-r8a77965.o

obj-$(CONFIG_PINCTRL_PFC_R8A774C0)	+= pfc-r8a77990.o

obj-$(CONFIG_PINCTRL_PFC_R8A7778)	+= pfc-r8a7778.o

obj-$(CONFIG_PINCTRL_PFC_R8A7779)	+= pfc-r8a7779.o

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