Commit 664fe85a authored by Marek Olšák's avatar Marek Olšák Committed by Alex Deucher
Browse files

drm/amdgpu: Allow reading more status registers on si/cik 



Allow userspace to read the same status registers for every family.
Based on commit c7890fea, added any of these registers if defined in
the include files of each architecture.

Signed-off-by: default avatarMarek Olšák <marek.olsak@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 121a2bc6

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+2 −1
Original line number Diff line number Diff line
@@ -83,9 +83,10 @@ 
 * - 3.33.0 - Fixes for GDS ENOMEM failures in AMDGPU_CS.

 * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches

 * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask

 * - 3.36.0 - Allow reading more status registers on si/cik

 */

#define KMS_DRIVER_MAJOR	3

#define KMS_DRIVER_MINOR	35

#define KMS_DRIVER_MINOR	36

#define KMS_DRIVER_PATCHLEVEL	0



int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/cik.c

+19 −0
Original line number Diff line number Diff line
@@ -966,6 +966,25 @@ static bool cik_read_bios_from_rom(struct amdgpu_device *adev, 


static const struct amdgpu_allowed_register_entry cik_allowed_read_registers[] = {

	{mmGRBM_STATUS},

	{mmGRBM_STATUS2},

	{mmGRBM_STATUS_SE0},

	{mmGRBM_STATUS_SE1},

	{mmGRBM_STATUS_SE2},

	{mmGRBM_STATUS_SE3},

	{mmSRBM_STATUS},

	{mmSRBM_STATUS2},

	{mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET},

	{mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},

	{mmCP_STAT},

	{mmCP_STALLED_STAT1},

	{mmCP_STALLED_STAT2},

	{mmCP_STALLED_STAT3},

	{mmCP_CPF_BUSY_STAT},

	{mmCP_CPF_STALLED_STAT1},

	{mmCP_CPF_STATUS},

	{mmCP_CPC_BUSY_STAT},

	{mmCP_CPC_STALLED_STAT1},

	{mmCP_CPC_STATUS},

	{mmGB_ADDR_CONFIG},

	{mmMC_ARB_RAMCFG},

	{mmGB_TILE_MODE0},

drivers/gpu/drm/amd/amdgpu/nv.c

+1 −0
Original line number Diff line number Diff line
@@ -178,6 +178,7 @@ static struct soc15_allowed_register_entry nv_allowed_read_registers[] = { 
	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_BUSY_STAT)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STALLED_STAT1)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STATUS)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_BUSY_STAT)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STALLED_STAT1)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},

	{ SOC15_REG_ENTRY(GC, 0, mmGB_ADDR_CONFIG)},

drivers/gpu/drm/amd/amdgpu/si.c

+11 −0
Original line number Diff line number Diff line
@@ -975,6 +975,17 @@ static void si_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) 


static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {

	{GRBM_STATUS},

	{mmGRBM_STATUS2},

	{mmGRBM_STATUS_SE0},

	{mmGRBM_STATUS_SE1},

	{mmSRBM_STATUS},

	{mmSRBM_STATUS2},

	{DMA_STATUS_REG + DMA0_REGISTER_OFFSET},

	{DMA_STATUS_REG + DMA1_REGISTER_OFFSET},

	{mmCP_STAT},

	{mmCP_STALLED_STAT1},

	{mmCP_STALLED_STAT2},

	{mmCP_STALLED_STAT3},

	{GB_ADDR_CONFIG},

	{MC_ARB_RAMCFG},

	{GB_TILE_MODE0},

drivers/gpu/drm/amd/amdgpu/soc15.c

+1 −0
Original line number Diff line number Diff line
@@ -339,6 +339,7 @@ static struct soc15_allowed_register_entry soc15_allowed_read_registers[] = { 
	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_BUSY_STAT)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STALLED_STAT1)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STATUS)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_BUSY_STAT)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STALLED_STAT1)},

	{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},

	{ SOC15_REG_ENTRY(GC, 0, mmGB_ADDR_CONFIG)},

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