Commit 664695ae authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau: inform userspace of new kernel subchannel requirements 



All available subchannels are now available for userspace to do with as it
pleases on NVC0+.

On all earlier chipsets, the kernel still uses a software object on subc 0
to implement the page flip completion method.  I hope to find some decent
way of addressing this too, but it's a tad tricker prior to fermi.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 48aca13f

drivers/gpu/drm/nouveau/nouveau_channel.c

+4 −11
Original line number Diff line number Diff line
@@ -436,18 +436,11 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data, 
	}



	if (dev_priv->card_type < NV_C0) {

		init->subchan[0].handle = NvM2MF;

		if (dev_priv->card_type < NV_50)

			init->subchan[0].grclass = 0x0039;

		else

			init->subchan[0].grclass = 0x5039;

		init->subchan[1].handle = NvSw;

		init->subchan[1].grclass = NV_SW;

		init->nr_subchan = 2;

	} else {

		init->subchan[0].handle  = 0x9039;

		init->subchan[0].grclass = 0x9039;

		init->subchan[0].handle = NvSw;

		init->subchan[0].grclass = NV_SW;

		init->nr_subchan = 1;

	} else {

		init->nr_subchan = 0;

	}



	/* Named memory object area */

drivers/gpu/drm/nouveau/nouveau_dma.h

+2 −2
Original line number Diff line number Diff line
@@ -48,8 +48,8 @@ void nv50_dma_push(struct nouveau_channel *, struct nouveau_bo *, 


/* Hardcoded object assignments to subchannels (subchannel id). */

enum {

	NvSubM2MF	= 0,

	NvSubSw		= 1,

	NvSubSw		= 0,

	NvSubM2MF	= 1,

	NvSub2D		= 2,

	NvSubCtxSurf2D  = 2,

	NvSubGdiRect    = 3,

CRA Git | Maintained and supported by SUSTech CRA and CCSE