Commit 662be400 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-arm64-dt-for-v5.5-tag1' of... 

Merge tag 'renesas-arm64-dt-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM64 DT updates for v5.5

  - Support for the RZ/G2N (r8a774b1) SoC and the HiHope RZ/G2N board,
  - CPU idle support for R-Car H3 and M3-W,
  - LVDS and backlight support on the HiHope RZ/G2M and RZ/G2N boards,
    with Advantech idk-1110wr LVDS panel,
  - Minor fixes and improvements.

* tag 'renesas-arm64-dt-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (50 commits)
  arm64: dts: renesas: r8a774b1: Add CAN and CAN FD support
  arm64: dts: renesas: Add iommus to R-Car Gen3 SDHI/MMC nodes
  arm64: dts: renesas: r8a774b1: Add INTC-EX device node
  arm64: dts: renesas: r8a774b1: Add USB3.0 device nodes
  arm64: dts: renesas: r8a774b1: Add USB-DMAC and HSUSB device nodes
  arm64: dts: renesas: r8a774b1: Add USB2.0 phy and host (EHCI/OHCI) device nodes
  arm64: dts: renesas: r8a774b1: Add Sound and Audio DMAC device nodes
  arm64: dts: renesas: hihope-rzg2-ex: Let the board specific DT decide about pciec1
  arm64: dts: renesas: r8a774b1: Add PCIe device nodes
  arm64: dts: renesas: r8a774b1: Add all MSIOF nodes
  arm64: dts: renesas: r8a774b1: Add RWDT node
  arm64: dts: renesas: Add support for Advantech idk-1110wr LVDS panel
  arm64: dts: renesas: hihope-rzg2-ex: Add LVDS support
  arm64: dts: renesas: hihope-rzg2-ex: Enable backlight
  arm64: dts: renesas: r8a774b1: Add PWM device nodes
  arm64: dts: renesas: r8a774b1: Add FDP1 device nodes
  arm64: dts: renesas: r8a774b1-hihope-rzg2n: Add display clock properties
  arm64: dts: renesas: r8a774b1: Add HDMI encoder instance
  arm64: dts: renesas: r8a774b1: Add DU device to DT
  arm64: dts: renesas: hihope-common: Move du clk properties out of common dtsi
  ...

Link: https://lore.kernel.org/r/20191018101136.26350-4-geert+renesas@glider.be


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents aca95ea7 3fa08cbb

arch/arm64/boot/dts/renesas/Makefile

+2 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb

dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb

dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb

dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb

dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb

dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb

dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb

arch/arm64/boot/dts/renesas/hihope-common.dtsi

+9 −19
Original line number Diff line number Diff line
@@ -86,7 +86,7 @@ 


		label = "rcar-sound";



		dais = <&rsnd_port0>;

		dais = <&rsnd_port>;

	};



	vbus0_usb2: regulator-vbus0-usb2 {
@@ -142,14 +142,6 @@ 
};



&du {

	clocks = <&cpg CPG_MOD 724>,

		 <&cpg CPG_MOD 723>,

		 <&cpg CPG_MOD 722>,

		 <&versaclock5 1>,

		 <&x302_clk>,

		 <&versaclock5 2>;

	clock-names = "du.0", "du.1", "du.2",

		      "dclkin.0", "dclkin.1", "dclkin.2";

	status = "okay";

};
@@ -191,7 +183,7 @@ 
		port@2 {

			reg = <2>;

			dw_hdmi0_snd_in: endpoint {

				remote-endpoint = <&rsnd_endpoint0>;

				remote-endpoint = <&rsnd_endpoint>;

			};

		};

	};
@@ -327,20 +319,18 @@ 
	/* Single DAI */

	#sound-dai-cells = <0>;



	ports {

		rsnd_port0: port@0 {

			rsnd_endpoint0: endpoint {

	rsnd_port: port {

		rsnd_endpoint: endpoint {

			remote-endpoint = <&dw_hdmi0_snd_in>;



			dai-format = "i2s";

				bitclock-master = <&rsnd_endpoint0>;

				frame-master = <&rsnd_endpoint0>;

			bitclock-master = <&rsnd_endpoint>;

			frame-master = <&rsnd_endpoint>;



			playback = <&ssi2>;

		};

	};

};

};



&rwdt {

	timeout-sec = <60>;

arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi

+48 −3
Original line number Diff line number Diff line
@@ -13,6 +13,14 @@ 
	chosen {

		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";

	};



	backlight {

		compatible = "pwm-backlight";

		pwms = <&pwm0 0 50000>;



		brightness-levels = <0 2 8 16 32 64 128 255>;

		default-brightness-level = <6>;

	};

};



&avb {
@@ -43,11 +51,36 @@ 
	status = "okay";

};



&pciec0 {

	status = "okay";

&gpio1 {

	/*

	 * When GP1_20 is LOW LVDS0 is connected to the LVDS connector

	 * When GP1_20 is HIGH LVDS0 is connected to the LT8918L

	 */

	lvds-connector-en-gpio {

		gpio-hog;

		gpios = <20 GPIO_ACTIVE_HIGH>;

		output-low;

		line-name = "lvds-connector-en-gpio";

	};

};



&lvds0 {

	/*

	 * Please include the LVDS panel .dtsi file and uncomment the below line

	 * to enable LVDS panel connected to RZ/G2[MN] boards.

	 */



	/* status = "okay"; */



&pciec1 {

	ports {

		port@1 {

			lvds_connector: endpoint {

			};

		};

	};

};



&pciec0 {

	status = "okay";

};
@@ -82,4 +115,16 @@ 
		groups = "can1_data";

		function = "can1";

	};



	pwm0_pins: pwm0 {

		groups = "pwm0";

		function = "pwm0";

	};

};



&pwm0 {

	pinctrl-0 = <&pwm0_pins>;

	pinctrl-names = "default";



	status = "okay";

};

arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts

+4 −0
Original line number Diff line number Diff line
@@ -13,3 +13,7 @@ 
	compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2m",

		     "renesas,r8a774a1";

};



&pciec1 {

	status = "okay";

};

arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts

+11 −0
Original line number Diff line number Diff line
@@ -24,3 +24,14 @@ 
		reg = <0x6 0x00000000 0x0 0x80000000>;

	};

};



&du {

	clocks = <&cpg CPG_MOD 724>,

		 <&cpg CPG_MOD 723>,

		 <&cpg CPG_MOD 722>,

		 <&versaclock5 1>,

		 <&x302_clk>,

		 <&versaclock5 2>;

	clock-names = "du.0", "du.1", "du.2",

		      "dclkin.0", "dclkin.1", "dclkin.2";

};

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