Commit 6602be0e authored by Rodrigo Vivi's avatar Rodrigo Vivi
Browse files

drm/i915/cnl: Cannonlake color init. 



Cannonlake has same color setup as Geminilake.
Legacy color load luts doesn't work anymore on Cannonlake+.

Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarClinton Taylor <clinton.a.taylor@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499374873-2454-1-git-send-email-rodrigo.vivi@intel.com
parent 3d16ca58

drivers/gpu/drm/i915/i915_pci.c

+1 −0
Original line number Diff line number Diff line
@@ -449,6 +449,7 @@ static const struct intel_device_info intel_cannonlake_info = { 
	.gen = 10,

	.ddb_size = 1024,

	.has_csr = 1,

	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }

};



/*

drivers/gpu/drm/i915/intel_color.c

+1 −1
Original line number Diff line number Diff line
@@ -615,7 +615,7 @@ void intel_color_init(struct drm_crtc *crtc) 
		   IS_BROXTON(dev_priv)) {

		dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;

		dev_priv->display.load_luts = broadwell_load_luts;

	} else if (IS_GEMINILAKE(dev_priv)) {

	} else if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {

		dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;

		dev_priv->display.load_luts = glk_load_luts;

	} else {

drivers/gpu/drm/i915/intel_display.c

+2 −2
Original line number Diff line number Diff line
@@ -3311,7 +3311,7 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state, 


	plane_ctl = PLANE_CTL_ENABLE;



	if (!IS_GEMINILAKE(dev_priv)) {

	if (!IS_GEMINILAKE(dev_priv) && !IS_CANNONLAKE(dev_priv)) {

		plane_ctl |=

			PLANE_CTL_PIPE_GAMMA_ENABLE |

			PLANE_CTL_PIPE_CSC_ENABLE |
@@ -3367,7 +3367,7 @@ static void skylake_update_primary_plane(struct intel_plane *plane, 


	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);



	if (IS_GEMINILAKE(dev_priv)) {

	if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {

		I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),

			      PLANE_COLOR_PIPE_GAMMA_ENABLE |

			      PLANE_COLOR_PIPE_CSC_ENABLE |

drivers/gpu/drm/i915/intel_sprite.c

+1 −1
Original line number Diff line number Diff line
@@ -262,7 +262,7 @@ skl_update_plane(struct intel_plane *plane, 


	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);



	if (IS_GEMINILAKE(dev_priv)) {

	if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {

		I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),

			      PLANE_COLOR_PIPE_GAMMA_ENABLE |

			      PLANE_COLOR_PIPE_CSC_ENABLE |

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