phy: qcom-ufs: fix build error when the component is built as a module

out:

	return ret;

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_enable_ref_clk);

static

int ufs_qcom_phy_disable_vreg(struct phy *phy,

		phy->is_ref_clk_enabled = false;

	}

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_ref_clk);

#define UFS_REF_CLK_EN	(1 << 5)

{

	ufs_qcom_phy_dev_ref_clk_ctrl(generic_phy, true);

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_enable_dev_ref_clk);

void ufs_qcom_phy_disable_dev_ref_clk(struct phy *generic_phy)

{

	ufs_qcom_phy_dev_ref_clk_ctrl(generic_phy, false);

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_dev_ref_clk);

/* Turn ON M-PHY RMMI interface clocks */

int ufs_qcom_phy_enable_iface_clk(struct phy *generic_phy)

out:

	return ret;

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_enable_iface_clk);

/* Turn OFF M-PHY RMMI interface clocks */

void ufs_qcom_phy_disable_iface_clk(struct phy *generic_phy)

		phy->is_iface_clk_enabled = false;

	}

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_iface_clk);

int ufs_qcom_phy_start_serdes(struct phy *generic_phy)

{

	return ret;

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_start_serdes);

int ufs_qcom_phy_set_tx_lane_enable(struct phy *generic_phy, u32 tx_lanes)

{

	return ret;

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_set_tx_lane_enable);

void ufs_qcom_phy_save_controller_version(struct phy *generic_phy,

					  u8 major, u16 minor, u16 step)

	ufs_qcom_phy->host_ctrl_rev_minor = minor;

	ufs_qcom_phy->host_ctrl_rev_step = step;

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_save_controller_version);

int ufs_qcom_phy_calibrate_phy(struct phy *generic_phy, bool is_rate_B)

{

	return ret;

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_calibrate_phy);

int ufs_qcom_phy_remove(struct phy *generic_phy,

			struct ufs_qcom_phy *ufs_qcom_phy)

	return ufs_qcom_phy->phy_spec_ops->

			is_physical_coding_sublayer_ready(ufs_qcom_phy);

}

EXPORT_SYMBOL_GPL(ufs_qcom_phy_is_pcs_ready);

int ufs_qcom_phy_power_on(struct phy *generic_phy)

{