Commit 65ab0dba authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'ti-k3-soc-for-v5.4' of... 

Merge tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/late

Texas Instruments K3 SoC family changes for 5.4

- Typo fixes for gic-its unit addresses for both am654 and j721e
- HW spinlock nodes added for both am654 and j721e
- GPIO support for j721e
- power-domain cells update for both am654 / j721e for exclusive only
  access

* tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address
  arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address
  arm64: dts: ti: k3-j721e-main: Add hwspinlock node
  arm64: dts: ti: k3-am65-main: Add hwspinlock node
  arm64: dts: k3-j721e: Add gpio-keys on common processor board
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
  arm64: dts: ti: k3-j721e-common-proc-board: Disable unused gpio modules
  arm64: dts: ti: k3-j721e: Add gpio nodes in wakeup domain
  arm64: dts: ti: k3-j721e: Add gpio nodes in main domain
  arm64: dts: ti: k3-j721e: Update the power domain cells
  arm64: dts: ti: k3-am654: Update the power domain cells
  soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
  dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
  firmware: ti_sci: Allow for device shared and exclusive requests

Link: https://lore.kernel.org/r/b838d666-ab3b-7d41-67d4-09d606c732da@ti.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 1fb2e59c d6dabd6f

Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt

+9 −2
Original line number Diff line number Diff line
@@ -19,8 +19,15 @@ child of the pmmc node. 
Required Properties:

--------------------

- compatible: should be "ti,sci-pm-domain"

- #power-domain-cells: Must be 1 so that an id can be provided in each

		       device node.

- #power-domain-cells: Can be one of the following:

			1: Containing the device id of each node

			2: First entry should be device id

			   Second entry should be one of the floowing:

			   TI_SCI_PD_EXCLUSIVE: To allow device to be

						exclusively controlled by

						the requesting hosts.

			   TI_SCI_PD_SHARED: To allow device to be shared

					     by multiple hosts.



Example (K2G):

-------------

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -15885,6 +15885,7 @@ F: drivers/firmware/ti_sci* 
F:	include/linux/soc/ti/ti_sci_protocol.h

F:	Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt

F:	drivers/soc/ti/ti_sci_pm_domains.c

F:	include/dt-bindings/soc/ti,sci_pm_domain.h

F:	Documentation/devicetree/bindings/reset/ti,sci-reset.txt

F:	Documentation/devicetree/bindings/clock/ti,sci-clk.txt

F:	drivers/clk/keystone/sci-clk.c

arch/arm64/boot/dts/ti/k3-am65-main.dtsi

+29 −23
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 
		 */

		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;



		gic_its: gic-its@18200000 {

		gic_its: gic-its@1820000 {

			compatible = "arm,gic-v3-its";

			reg = <0x00 0x01820000 0x00 0x10000>;

			socionext,synquacer-pre-its = <0x1000000 0x400000>;
@@ -67,7 +67,7 @@ 
		reg = <0x0 0x900000 0x0 0x2000>;

		reg-names = "serdes";

		#phy-cells = <2>;

		power-domains = <&k3_pds 153>;

		power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>;

		clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";

		assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
@@ -82,7 +82,7 @@ 
		reg = <0x0 0x910000 0x0 0x2000>;

		reg-names = "serdes";

		#phy-cells = <2>;

		power-domains = <&k3_pds 154>;

		power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&serdes0 AM654_SERDES_RO_REFCLK>, <&k3_clks 154 1>, <&k3_clks 154 5>;

		clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";

		assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
@@ -100,7 +100,7 @@ 
		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 146>;

		power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;

	};



	main_uart1: serial@2810000 {
@@ -110,7 +110,7 @@ 
		reg-io-width = <4>;

		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		power-domains = <&k3_pds 147>;

		power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;

	};



	main_uart2: serial@2820000 {
@@ -120,7 +120,7 @@ 
		reg-io-width = <4>;

		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		power-domains = <&k3_pds 148>;

		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;

	};



	main_pmx0: pinmux@11c000 {
@@ -147,7 +147,7 @@ 
		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 110 1>;

		power-domains = <&k3_pds 110>;

		power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;

	};



	main_i2c1: i2c@2010000 {
@@ -158,7 +158,7 @@ 
		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 111 1>;

		power-domains = <&k3_pds 111>;

		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;

	};



	main_i2c2: i2c@2020000 {
@@ -169,7 +169,7 @@ 
		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 112 1>;

		power-domains = <&k3_pds 112>;

		power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;

	};



	main_i2c3: i2c@2030000 {
@@ -180,14 +180,14 @@ 
		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 113 1>;

		power-domains = <&k3_pds 113>;

		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;

	};



	ecap0: pwm@3100000 {

		compatible = "ti,am654-ecap", "ti,am3352-ecap";

		#pwm-cells = <3>;

		reg = <0x0 0x03100000 0x0 0x60>;

		power-domains = <&k3_pds 39>;

		power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 39 0>;

		clock-names = "fck";

	};
@@ -197,7 +197,7 @@ 
		reg = <0x0 0x2100000 0x0 0x400>;

		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&k3_clks 137 1>;

		power-domains = <&k3_pds 137>;

		power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

	};
@@ -207,7 +207,7 @@ 
		reg = <0x0 0x2110000 0x0 0x400>;

		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&k3_clks 138 1>;

		power-domains = <&k3_pds 138>;

		power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

		assigned-clocks = <&k3_clks 137 1>;
@@ -219,7 +219,7 @@ 
		reg = <0x0 0x2120000 0x0 0x400>;

		interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&k3_clks 139 1>;

		power-domains = <&k3_pds 139>;

		power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

	};
@@ -229,7 +229,7 @@ 
		reg = <0x0 0x2130000 0x0 0x400>;

		interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&k3_clks 140 1>;

		power-domains = <&k3_pds 140>;

		power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

	};
@@ -239,7 +239,7 @@ 
		reg = <0x0 0x2140000 0x0 0x400>;

		interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&k3_clks 141 1>;

		power-domains = <&k3_pds 141>;

		power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

	};
@@ -247,7 +247,7 @@ 
	sdhci0: sdhci@4f80000 {

		compatible = "ti,am654-sdhci-5.1";

		reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;

		power-domains = <&k3_pds 47>;

		power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;

		clock-names = "clk_ahb", "clk_xin";

		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
@@ -306,7 +306,7 @@ 
		ranges = <0x0 0x0 0x4000000 0x20000>;

		interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;

		dma-coherent;

		power-domains = <&k3_pds 151>;

		power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;

		assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;

		assigned-clock-parents = <&k3_clks 151 4>,	/* set REF_CLK to 20MHz i.e. PER0_PLL/48 */

					 <&k3_clks 151 9>;	/* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
@@ -345,7 +345,7 @@ 
		ranges = <0x0 0x0 0x4020000 0x20000>;

		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;

		dma-coherent;

		power-domains = <&k3_pds 152>;

		power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;

		assigned-clocks = <&k3_clks 152 2>;

		assigned-clock-parents = <&k3_clks 152 4>;	/* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
@@ -413,6 +413,12 @@ 
			ti,sci-rm-range-vint = <0x0>;

			ti,sci-rm-range-global-event = <0x1>;

		};



		hwspinlock: spinlock@30e00000 {

			compatible = "ti,am654-hwspinlock";

			reg = <0x00 0x30e00000 0x00 0x1000>;

			#hwlock-cells = <1>;

		};

	};



	main_gpio0:  main_gpio0@600000 {
@@ -451,7 +457,7 @@ 
		compatible = "ti,am654-pcie-rc";

		reg =  <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;

		reg-names = "app", "dbics", "config", "atu";

		power-domains = <&k3_pds 120>;

		power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <3>;

		#size-cells = <2>;

		ranges = <0x81000000 0 0          0x0 0x10020000 0 0x00010000
@@ -470,7 +476,7 @@ 
		compatible = "ti,am654-pcie-ep";

		reg =  <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>;

		reg-names = "app", "dbics", "addr_space", "atu";

		power-domains = <&k3_pds 120>;

		power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;

		ti,syscon-pcie-mode = <&pcie0_mode>;

		num-ib-windows = <16>;

		num-ob-windows = <16>;
@@ -483,7 +489,7 @@ 
		compatible = "ti,am654-pcie-rc";

		reg =  <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;

		reg-names = "app", "dbics", "config", "atu";

		power-domains = <&k3_pds 121>;

		power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <3>;

		#size-cells = <2>;

		ranges = <0x81000000 0 0          0x0   0x18020000 0 0x00010000
@@ -502,7 +508,7 @@ 
		compatible = "ti,am654-pcie-ep";

		reg =  <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>;

		reg-names = "app", "dbics", "addr_space", "atu";

		power-domains = <&k3_pds 121>;

		power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;

		ti,syscon-pcie-mode = <&pcie1_mode>;

		num-ib-windows = <16>;

		num-ob-windows = <16>;

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 
			interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;

			clock-frequency = <96000000>;

			current-speed = <115200>;

			power-domains = <&k3_pds 149>;

			power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;

	};



	mcu_ram: sram@41c00000 {
@@ -33,7 +33,7 @@ 
		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 114 1>;

		power-domains = <&k3_pds 114>;

		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;

	};



	mcu_spi0: spi@40300000 {
@@ -41,7 +41,7 @@ 
		reg = <0x0 0x40300000 0x0 0x400>;

		interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&k3_clks 142 1>;

		power-domains = <&k3_pds 142>;

		power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

	};
@@ -51,7 +51,7 @@ 
		reg = <0x0 0x40310000 0x0 0x400>;

		interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&k3_clks 143 1>;

		power-domains = <&k3_pds 143>;

		power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

	};
@@ -61,7 +61,7 @@ 
		reg = <0x0 0x40320000 0x0 0x400>;

		interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&k3_clks 144 1>;

		power-domains = <&k3_pds 144>;

		power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

	};

arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 


		k3_pds: power-controller {

			compatible = "ti,sci-pm-domain";

			#power-domain-cells = <1>;

			#power-domain-cells = <2>;

		};



		k3_clks: clocks {
@@ -50,7 +50,7 @@ 
		interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 150>;

		power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;

	};



	wkup_i2c0: i2c@42120000 {
@@ -61,7 +61,7 @@ 
		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 115 1>;

		power-domains = <&k3_pds 115>;

		power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;

	};



	intr_wkup_gpio: interrupt-controller2 {

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