ARM: dts: r8a7794: Correct SCIFB reg properties to cover all registers (655ea555) · Commits · 戴 / test

Several SCIFB registers reside outside the reported register ranges. Fortunately this works (on Linux), due to the PAGE_SIZE granularity of ioremap(). Extend the sizes from 64 to 0x100 bytes to fix this, like is done on SH/R-Mobile SoCs. Signed-off-by:

Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:

Simon Horman <horms+renesas@verge.net.au>

arch/arm/boot/dts/r8a7794.dtsi

+3 −3

Original line number	Diff line number	Diff line
		@@ -411,7 +411,7 @@
		scifb0: serial@e6c20000 {
		compatible = "renesas,scifb-r8a7794",
		"renesas,rcar-gen2-scifb", "renesas,scifb";
		reg = <0 0xe6c20000 0 64>;
		reg = <0 0xe6c20000 0 0x100>;
		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
		clock-names = "fck";
		@@ -425,7 +425,7 @@
		scifb1: serial@e6c30000 {
		compatible = "renesas,scifb-r8a7794",
		"renesas,rcar-gen2-scifb", "renesas,scifb";
		reg = <0 0xe6c30000 0 64>;
		reg = <0 0xe6c30000 0 0x100>;
		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
		clock-names = "fck";
		@@ -439,7 +439,7 @@
		scifb2: serial@e6ce0000 {
		compatible = "renesas,scifb-r8a7794",
		"renesas,rcar-gen2-scifb", "renesas,scifb";
		reg = <0 0xe6ce0000 0 64>;
		reg = <0 0xe6ce0000 0 0x100>;
		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
		clock-names = "fck";

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