Unverified Commit 655c0f42 authored by Maxime Ripard's avatar Maxime Ripard
Browse files

ARM: sunxi: dts: Split USB PHY cells into an array



Even though it doesn't make any difference at the binary level, the reg
property is an array of cells, and should be represented as such.

Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent 939b6654
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+1 −1
Original line number Diff line number Diff line
@@ -502,7 +502,7 @@
		usbphy: phy@1c13400 {
			#phy-cells = <1>;
			compatible = "allwinner,sun4i-a10-usb-phy";
			reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
			reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
			reg-names = "phy_ctrl", "pmu1", "pmu2";
			clocks = <&ccu CLK_USB_PHY>;
			clock-names = "usb_phy";
+1 −1
Original line number Diff line number Diff line
@@ -366,7 +366,7 @@
		usbphy: phy@1c13400 {
			#phy-cells = <1>;
			compatible = "allwinner,sun5i-a13-usb-phy";
			reg = <0x01c13400 0x10 0x01c14800 0x4>;
			reg = <0x01c13400 0x10>, <0x01c14800 0x4>;
			reg-names = "phy_ctrl", "pmu1";
			clocks = <&ccu CLK_USB_PHY0>;
			clock-names = "usb_phy";
+1 −1
Original line number Diff line number Diff line
@@ -594,7 +594,7 @@
		usbphy: phy@1c13400 {
			#phy-cells = <1>;
			compatible = "allwinner,sun7i-a20-usb-phy";
			reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
			reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
			reg-names = "phy_ctrl", "pmu1", "pmu2";
			clocks = <&ccu CLK_USB_PHY>;
			clock-names = "usb_phy";