Commit 65010193 authored by Jiansong Chen's avatar Jiansong Chen Committed by Alex Deucher
Browse files

drm/amdgpu/gfx10: add support for navy_flounder firmware 



Declare the gfx/compute firmwares.

Signed-off-by: default avatarJiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 41f446bf

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+10 −0
Original line number Diff line number Diff line
@@ -145,6 +145,13 @@ MODULE_FIRMWARE("amdgpu/sienna_cichlid_mec.bin"); 
MODULE_FIRMWARE("amdgpu/sienna_cichlid_mec2.bin");

MODULE_FIRMWARE("amdgpu/sienna_cichlid_rlc.bin");



MODULE_FIRMWARE("amdgpu/navy_flounder_ce.bin");

MODULE_FIRMWARE("amdgpu/navy_flounder_pfp.bin");

MODULE_FIRMWARE("amdgpu/navy_flounder_me.bin");

MODULE_FIRMWARE("amdgpu/navy_flounder_mec.bin");

MODULE_FIRMWARE("amdgpu/navy_flounder_mec2.bin");

MODULE_FIRMWARE("amdgpu/navy_flounder_rlc.bin");



static const struct soc15_reg_golden golden_settings_gc_10_1[] =

{

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_4, 0xffffffff, 0x00400014),
@@ -3578,6 +3585,9 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev) 
	case CHIP_SIENNA_CICHLID:

		chip_name = "sienna_cichlid";

		break;

	case CHIP_NAVY_FLOUNDER:

		chip_name = "navy_flounder";

		break;

	default:

		BUG();

	}

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