Commit 64f32d9d authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-arm64-dt2-for-v5.2' of... 

Merge tag 'renesas-arm64-dt2-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Second Round of Renesas ARM64 Based SoC DT Updates for v5.2

* R-Car H3 (r8a7795), M3-N (r8a77965) and E3 (r8a77990) SoCs
  - Describe CMT devices in DT

* R-Car M3-N (r8a77965) SoC
  - Remove unecessary reg-names of display node

* R-Car V3H (r8a77980) SoC
  - Add missing "renesas,id" property to VIN of device tree

* RZ/G2E (r8a774c0) based CAT874 board
  - Add USB-HOST support

* tag 'renesas-arm64-dt2-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  arm64: dts: renesas: r8a77980: Add "renesas,id" to VIN
  arm64: dts: renesas: r8a77965: Remove reg-names of display node
  arm64: dts: renesas: r8a77990: Add CMT device nodes
  arm64: dts: renesas: r8a77965: Add CMT device nodes
  arm64: dts: renesas: r8a7795: Add CMT device nodes
  arm64: dts: renesas: cat874: Add USB-HOST support

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 68a3ead5 b7f5a8e4

arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts

+15 −0
Original line number Diff line number Diff line
@@ -76,6 +76,11 @@ 
	};

};



&ehci0 {

	dr_mode = "host";

	status = "okay";

};



&extal_clk {

	clock-frequency = <48000000>;

};
@@ -93,6 +98,11 @@ 
	};

};



&ohci0 {

	dr_mode = "host";

	status = "okay";

};



&pcie_bus_clk {

	clock-frequency = <100000000>;

};
@@ -151,3 +161,8 @@ 
	sd-uhs-sdr104;

	status = "okay";

};



&usb2_phy0 {

	renesas,no-otg-pins;

	status = "okay";

};

arch/arm64/boot/dts/renesas/r8a7795.dtsi

+70 −0
Original line number Diff line number Diff line
@@ -462,6 +462,76 @@ 
			reg = <0 0xe6060000 0 0x50c>;

		};



		cmt0: timer@e60f0000 {

			compatible = "renesas,r8a7795-cmt0",

				     "renesas,rcar-gen3-cmt0";

			reg = <0 0xe60f0000 0 0x1004>;

			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 303>;

			clock-names = "fck";

			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

			resets = <&cpg 303>;

			status = "disabled";

		};



		cmt1: timer@e6130000 {

			compatible = "renesas,r8a7795-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6130000 0 0x1004>;

			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 302>;

			clock-names = "fck";

			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

			resets = <&cpg 302>;

			status = "disabled";

		};



		cmt2: timer@e6140000 {

			compatible = "renesas,r8a7795-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6140000 0 0x1004>;

			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 301>;

			clock-names = "fck";

			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

			resets = <&cpg 301>;

			status = "disabled";

		};



		cmt3: timer@e6148000 {

			compatible = "renesas,r8a7795-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6148000 0 0x1004>;

			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 300>;

			clock-names = "fck";

			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

			resets = <&cpg 300>;

			status = "disabled";

		};



		cpg: clock-controller@e6150000 {

			compatible = "renesas,r8a7795-cpg-mssr";

			reg = <0 0xe6150000 0 0x1000>;

arch/arm64/boot/dts/renesas/r8a77965.dtsi

+70 −1
Original line number Diff line number Diff line
@@ -317,6 +317,76 @@ 
			reg = <0 0xe6060000 0 0x50c>;

		};



		cmt0: timer@e60f0000 {

			compatible = "renesas,r8a77965-cmt0",

				     "renesas,rcar-gen3-cmt0";

			reg = <0 0xe60f0000 0 0x1004>;

			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 303>;

			clock-names = "fck";

			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;

			resets = <&cpg 303>;

			status = "disabled";

		};



		cmt1: timer@e6130000 {

			compatible = "renesas,r8a77965-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6130000 0 0x1004>;

			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 302>;

			clock-names = "fck";

			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;

			resets = <&cpg 302>;

			status = "disabled";

		};



		cmt2: timer@e6140000 {

			compatible = "renesas,r8a77965-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6140000 0 0x1004>;

			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 301>;

			clock-names = "fck";

			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;

			resets = <&cpg 301>;

			status = "disabled";

		};



		cmt3: timer@e6148000 {

			compatible = "renesas,r8a77965-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6148000 0 0x1004>;

			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 300>;

			clock-names = "fck";

			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;

			resets = <&cpg 300>;

			status = "disabled";

		};



		cpg: clock-controller@e6150000 {

			compatible = "renesas,r8a77965-cpg-mssr";

			reg = <0 0xe6150000 0 0x1000>;
@@ -2377,7 +2447,6 @@ 
		du: display@feb00000 {

			compatible = "renesas,du-r8a77965";

			reg = <0 0xfeb00000 0 0x80000>;

			reg-names = "du";

			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;

arch/arm64/boot/dts/renesas/r8a77980.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -865,6 +865,7 @@ 
			clocks = <&cpg CPG_MOD 811>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 811>;

			renesas,id = <0>;

			status = "disabled";



			ports {
@@ -892,6 +893,7 @@ 
			clocks = <&cpg CPG_MOD 810>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			status = "disabled";

			renesas,id = <1>;

			resets = <&cpg 810>;



			ports {
@@ -919,6 +921,7 @@ 
			clocks = <&cpg CPG_MOD 809>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 809>;

			renesas,id = <2>;

			status = "disabled";



			ports {
@@ -946,6 +949,7 @@ 
			clocks = <&cpg CPG_MOD 808>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 808>;

			renesas,id = <3>;

			status = "disabled";



			ports {
@@ -973,6 +977,7 @@ 
			clocks = <&cpg CPG_MOD 807>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 807>;

			renesas,id = <4>;

			status = "disabled";



			ports {
@@ -1000,6 +1005,7 @@ 
			clocks = <&cpg CPG_MOD 806>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 806>;

			renesas,id = <5>;

			status = "disabled";



			ports {
@@ -1027,6 +1033,7 @@ 
			clocks = <&cpg CPG_MOD 805>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 805>;

			renesas,id = <6>;

			status = "disabled";



			ports {
@@ -1054,6 +1061,7 @@ 
			clocks = <&cpg CPG_MOD 804>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 804>;

			renesas,id = <7>;

			status = "disabled";



			ports {
@@ -1081,6 +1089,7 @@ 
			clocks = <&cpg CPG_MOD 628>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 628>;

			renesas,id = <8>;

			status = "disabled";

		};
@@ -1091,6 +1100,7 @@ 
			clocks = <&cpg CPG_MOD 627>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 627>;

			renesas,id = <9>;

			status = "disabled";

		};
@@ -1101,6 +1111,7 @@ 
			clocks = <&cpg CPG_MOD 625>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 625>;

			renesas,id = <10>;

			status = "disabled";

		};
@@ -1111,6 +1122,7 @@ 
			clocks = <&cpg CPG_MOD 618>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 618>;

			renesas,id = <11>;

			status = "disabled";

		};
@@ -1121,6 +1133,7 @@ 
			clocks = <&cpg CPG_MOD 612>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 612>;

			renesas,id = <12>;

			status = "disabled";

		};
@@ -1131,6 +1144,7 @@ 
			clocks = <&cpg CPG_MOD 608>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 608>;

			renesas,id = <13>;

			status = "disabled";

		};
@@ -1141,6 +1155,7 @@ 
			clocks = <&cpg CPG_MOD 605>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 605>;

			renesas,id = <14>;

			status = "disabled";

		};
@@ -1151,6 +1166,7 @@ 
			clocks = <&cpg CPG_MOD 604>;

			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

			resets = <&cpg 604>;

			renesas,id = <15>;

			status = "disabled";

		};

arch/arm64/boot/dts/renesas/r8a77990.dtsi

+70 −0
Original line number Diff line number Diff line
@@ -284,6 +284,76 @@ 
			status = "disabled";

		};



		cmt0: timer@e60f0000 {

			compatible = "renesas,r8a77990-cmt0",

				     "renesas,rcar-gen3-cmt0";

			reg = <0 0xe60f0000 0 0x1004>;

			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 303>;

			clock-names = "fck";

			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;

			resets = <&cpg 303>;

			status = "disabled";

		};



		cmt1: timer@e6130000 {

			compatible = "renesas,r8a77990-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6130000 0 0x1004>;

			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 302>;

			clock-names = "fck";

			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;

			resets = <&cpg 302>;

			status = "disabled";

		};



		cmt2: timer@e6140000 {

			compatible = "renesas,r8a77990-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6140000 0 0x1004>;

			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 301>;

			clock-names = "fck";

			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;

			resets = <&cpg 301>;

			status = "disabled";

		};



		cmt3: timer@e6148000 {

			compatible = "renesas,r8a77990-cmt1",

				     "renesas,rcar-gen3-cmt1";

			reg = <0 0xe6148000 0 0x1004>;

			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 300>;

			clock-names = "fck";

			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;

			resets = <&cpg 300>;

			status = "disabled";

		};



		cpg: clock-controller@e6150000 {

			compatible = "renesas,r8a77990-cpg-mssr";

			reg = <0 0xe6150000 0 0x1000>;

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