Commit 64dbc3d5 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

ARM: dts: Configure system timers for omap2 



We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.

As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.

Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.

Let's also update the dts file to use #include while at it.

Cc: devicetree@vger.kernel.org
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 83bd18b4

arch/arm/boot/dts/omap2.dtsi

+26 −5
Original line number Diff line number Diff line
@@ -201,11 +201,32 @@ 
			clock-frequency = <48000000>;

		};



		timer2: timer@4802a000 {

		timer2_target: target-module@4802a000 {

			compatible = "ti,sysc-omap2-timer", "ti,sysc";

			reg = <0x4802a000 0x4>,

			      <0x4802a010 0x4>,

			      <0x4802a014 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |

					 SYSC_OMAP2_EMUFREE |

					 SYSC_OMAP2_ENAWAKEUP |

					 SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			clocks = <&gpt2_fck>, <&gpt2_ick>;

			clock-names = "fck", "ick";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x4802a000 0x1000>;



			timer2: timer@0 {

				compatible = "ti,omap2420-timer";

			reg = <0x4802a000 0x400>;

				reg = <0 0x400>;

				interrupts = <38>;

			ti,hwmods = "timer2";

			};

		};



		timer3: timer@48078000 {

arch/arm/boot/dts/omap2420.dtsi

+56 −12
Original line number Diff line number Diff line
@@ -68,10 +68,23 @@ 
				};

			};



			counter32k: counter@4000 {

			target-module@4000 {

				compatible = "ti,sysc-omap2", "ti,sysc";

				reg = <0x4000 0x4>,

				      <0x4004 0x4>;

				reg-names = "rev", "sysc";

				ti,sysc-sidle = <SYSC_IDLE_FORCE>,

						<SYSC_IDLE_NO>;

				clocks = <&func_32k_ck>;

				clock-names = "fck";

				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0x0 0x4000 0x1000>;



				counter32k: counter@0 {

					compatible = "ti,omap-counter32k";

				reg = <0x4000 0x20>;

				ti,hwmods = "counter_32k";

					reg = <0 0x20>;

				};

			};

		};
@@ -194,13 +207,34 @@ 
			};

		};



		timer1: timer@48028000 {

		timer1_target: target-module@48028000 {

			compatible = "ti,sysc-omap2-timer", "ti,sysc";

			reg = <0x48028000 0x4>,

			      <0x48028010 0x4>,

			      <0x48028014 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |

					 SYSC_OMAP2_EMUFREE |

					 SYSC_OMAP2_ENAWAKEUP |

					 SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			clocks = <&gpt1_fck>, <&gpt1_ick>;

			clock-names = "fck", "ick";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x48028000 0x1000>;



			timer1: timer@0 {

				compatible = "ti,omap2420-timer";

			reg = <0x48028000 0x400>;

				reg = <0 0x400>;

				interrupts = <37>;

			ti,hwmods = "timer1";

				ti,timer-alwon;

			};

		};



		wd_timer2: wdt@48022000 {

			compatible = "ti,omap2-wdt";
@@ -218,5 +252,15 @@ 
	compatible = "ti,omap2420-i2c";

};



/include/ "omap24xx-clocks.dtsi"

/include/ "omap2420-clocks.dtsi"
 
#include "omap24xx-clocks.dtsi"

#include "omap2420-clocks.dtsi"



/* Preferred always-on timer for clockevent */

&timer1_target {

	ti,no-reset-on-init;

	ti,no-idle;

	timer@0 {

		assigned-clocks = <&gpt1_fck>;

		assigned-clock-parents = <&func_32k_ck>;

	};

};

arch/arm/boot/dts/omap2430.dtsi

+56 −12
Original line number Diff line number Diff line
@@ -81,10 +81,23 @@ 
				};

			};



			counter32k: counter@20000 {

			target-module@20000 {

				compatible = "ti,sysc-omap2", "ti,sysc";

				reg = <0x20000 0x4>,

				      <0x20004 0x4>;

				reg-names = "rev", "sysc";

				ti,sysc-sidle = <SYSC_IDLE_FORCE>,

						<SYSC_IDLE_NO>;

				clocks = <&func_32k_ck>;

				clock-names = "fck";

				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0x0 0x20000 0x1000>;



				counter32k: counter@0 {

					compatible = "ti,omap-counter32k";

				reg = <0x20000 0x20>;

				ti,hwmods = "counter_32k";

					reg = <0 0x20>;

				};

			};

		};
@@ -277,13 +290,34 @@ 
			};

		};



		timer1: timer@49018000 {

		timer1_target: target-module@49018000 {

			compatible = "ti,sysc-omap2-timer", "ti,sysc";

			reg = <0x49018000 0x4>,

			      <0x49018010 0x4>,

			      <0x49018014 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |

					 SYSC_OMAP2_EMUFREE |

					 SYSC_OMAP2_ENAWAKEUP |

					 SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			clocks = <&gpt1_fck>, <&gpt1_ick>;

			clock-names = "fck", "ick";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x49018000 0x1000>;



			timer1: timer@0 {

				compatible = "ti,omap2420-timer";

			reg = <0x49018000 0x400>;

				reg = <0 0x400>;

				interrupts = <37>;

			ti,hwmods = "timer1";

				ti,timer-alwon;

			};

		};



		mcspi3: spi@480b8000 {

			compatible = "ti,omap2-mcspi";
@@ -321,5 +355,15 @@ 
	compatible = "ti,omap2430-i2c";

};



/include/ "omap24xx-clocks.dtsi"

/include/ "omap2430-clocks.dtsi"
 
#include "omap24xx-clocks.dtsi"

#include "omap2430-clocks.dtsi"



/* Preferred always-on timer for clockevent */

&timer1_target {

	ti,no-reset-on-init;

	ti,no-idle;

	timer@0 {

		assigned-clocks = <&gpt1_fck>;

		assigned-clock-parents = <&func_32k_ck>;

	};

};

arch/arm/mach-omap2/board-generic.c

+2 −2
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") 
	.map_io		= omap242x_map_io,

	.init_early	= omap2420_init_early,

	.init_machine	= omap_generic_init,

	.init_time	= omap_init_time,

	.init_time	= omap_init_time_of,

	.dt_compat	= omap242x_boards_compat,

	.restart	= omap2xxx_restart,

MACHINE_END
@@ -67,7 +67,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") 
	.map_io		= omap243x_map_io,

	.init_early	= omap2430_init_early,

	.init_machine	= omap_generic_init,

	.init_time	= omap_init_time,

	.init_time	= omap_init_time_of,

	.dt_compat	= omap243x_boards_compat,

	.restart	= omap2xxx_restart,

MACHINE_END

arch/arm/mach-omap2/omap_hwmod_2420_data.c

+0 −20
Original line number Diff line number Diff line
@@ -264,14 +264,6 @@ static struct omap_hwmod_ocp_if omap2420_l3__dsp = { 
	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_wkup -> timer1 */

static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {

	.master		= &omap2xxx_l4_wkup_hwmod,

	.slave		= &omap2xxx_timer1_hwmod,

	.clk		= "gpt1_ick",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_wkup -> wd_timer2 */

static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {

	.master		= &omap2xxx_l4_wkup_hwmod,
@@ -352,15 +344,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = { 
	.flags		= OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,

};





/* l4_wkup -> 32ksync_counter */

static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {

	.master		= &omap2xxx_l4_wkup_hwmod,

	.slave		= &omap2xxx_counter_32k_hwmod,

	.clk		= "sync_32k_ick",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



static struct omap_hwmod_ocp_if omap2420_l3__gpmc = {

	.master		= &omap2xxx_l3_main_hwmod,

	.slave		= &omap2xxx_gpmc_hwmod,
@@ -382,8 +365,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { 
	&omap2420_l4_core__i2c2,

	&omap2420_l3__iva,

	&omap2420_l3__dsp,

	&omap2420_l4_wkup__timer1,

	&omap2xxx_l4_core__timer2,

	&omap2xxx_l4_core__timer3,

	&omap2xxx_l4_core__timer4,

	&omap2xxx_l4_core__timer5,
@@ -411,7 +392,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { 
	&omap2xxx_l4_core__sham,

	&omap2xxx_l4_core__aes,

	&omap2420_l4_core__hdq1w,

	&omap2420_l4_wkup__counter_32k,

	&omap2420_l3__gpmc,

	NULL,

};

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