Commit 64d6a120 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-hyperv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 hyperv updates from Ingo Molnar:
 "Misc updates to the hyperv guest code:

   - Rework clockevents initialization to better support hibernation

   - Allow guests to enable InvariantTSC

   - Micro-optimize send_ipi_one"

* 'x86-hyperv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/hyperv: Initialize clockevents earlier in CPU onlining
  x86/hyperv: Allow guests to enable InvariantTSC
  x86/hyperv: Micro-optimize send_ipi_one()
parents cd4771f7 4df4cb9e

arch/x86/hyperv/hv_apic.c

+13 −3
Original line number Diff line number Diff line
@@ -194,10 +194,20 @@ do_ex_hypercall: 


static bool __send_ipi_one(int cpu, int vector)

{

	struct cpumask mask = CPU_MASK_NONE;

	int vp = hv_cpu_number_to_vp_number(cpu);



	cpumask_set_cpu(cpu, &mask);

	return __send_ipi_mask(&mask, vector);

	trace_hyperv_send_ipi_one(cpu, vector);



	if (!hv_hypercall_pg || (vp == VP_INVAL))

		return false;



	if ((vector < HV_IPI_LOW_VECTOR) || (vector > HV_IPI_HIGH_VECTOR))

		return false;



	if (vp >= 64)

		return __send_ipi_mask_ex(cpumask_of(cpu), vector);



	return !hv_do_fast_hypercall16(HVCALL_SEND_IPI, vector, BIT_ULL(vp));

}



static void hv_send_ipi(int cpu, int vector)

arch/x86/hyperv/hv_init.c

+6 −0
Original line number Diff line number Diff line
@@ -311,6 +311,12 @@ void __init hyperv_init(void) 
	hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg);

	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);



	/*

	 * Ignore any errors in setting up stimer clockevents

	 * as we can run with the LAPIC timer as a fallback.

	 */

	(void)hv_stimer_alloc();



	hv_apic_init();



	x86_init.pci.arch_init = hv_pci_init;

arch/x86/include/asm/hyperv-tlfs.h

+5 −0
Original line number Diff line number Diff line
@@ -86,6 +86,8 @@ 
#define HV_X64_ACCESS_FREQUENCY_MSRS		BIT(11)

/* AccessReenlightenmentControls privilege */

#define HV_X64_ACCESS_REENLIGHTENMENT		BIT(13)

/* AccessTscInvariantControls privilege */

#define HV_X64_ACCESS_TSC_INVARIANT		BIT(15)



/*

 * Feature identification: indicates which flags were specified at partition
@@ -278,6 +280,9 @@ 
#define HV_X64_MSR_TSC_EMULATION_CONTROL	0x40000107

#define HV_X64_MSR_TSC_EMULATION_STATUS		0x40000108



/* TSC invariant control */

#define HV_X64_MSR_TSC_INVARIANT_CONTROL	0x40000118



/*

 * Declare the MSR used to setup pages used to communicate with the hypervisor.

 */

arch/x86/include/asm/trace/hyperv.h

+15 −0
Original line number Diff line number Diff line
@@ -71,6 +71,21 @@ TRACE_EVENT(hyperv_send_ipi_mask, 
		      __entry->ncpus, __entry->vector)

	);



TRACE_EVENT(hyperv_send_ipi_one,

	    TP_PROTO(int cpu,

		     int vector),

	    TP_ARGS(cpu, vector),

	    TP_STRUCT__entry(

		    __field(int, cpu)

		    __field(int, vector)

		    ),

	    TP_fast_assign(__entry->cpu = cpu;

			   __entry->vector = vector;

		    ),

	    TP_printk("cpu %d vector %x",

		      __entry->cpu, __entry->vector)

	);



#endif /* CONFIG_HYPERV */



#undef TRACE_INCLUDE_PATH

arch/x86/kernel/cpu/mshyperv.c

+6 −1
Original line number Diff line number Diff line
@@ -290,7 +290,12 @@ static void __init ms_hyperv_init_platform(void) 
	machine_ops.shutdown = hv_machine_shutdown;

	machine_ops.crash_shutdown = hv_machine_crash_shutdown;

#endif

	if (ms_hyperv.features & HV_X64_ACCESS_TSC_INVARIANT) {

		wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x1);

		setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);

	} else {

		mark_tsc_unstable("running on Hyper-V");

	}



	/*

	 * Generation 2 instances don't support reading the NMI status from

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