Commit 64d41516 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

docs: fpga: replace :c:member: macros 



Those macros are not doing the right thing with Sphinx 3,
causing parse errors:

	./Documentation/driver-api/fpga/fpga-mgr.rst:104: WARNING: Unparseable C cross-reference: 'fpga_manager->state'
	Invalid C declaration: Expected end of definition. [error at 12]
	  fpga_manager->state
	  ------------^
	./Documentation/driver-api/fpga/fpga-programming.rst:18: WARNING: Unparseable C cross-reference: 'fpga_region->info'
	Invalid C declaration: Expected end of definition. [error at 11]
	  fpga_region->info
	  -----------^
	./Documentation/driver-api/fpga/fpga-region.rst:62: WARNING: Unparseable C cross-reference: 'fpga_region->bridge_list'
	Invalid C declaration: Expected end of definition. [error at 11]
	  fpga_region->bridge_list
	  -----------^
	./Documentation/driver-api/fpga/fpga-region.rst:62: WARNING: Unparseable C cross-reference: 'fpga_region->get_bridges'
	Invalid C declaration: Expected end of definition. [error at 11]
	  fpga_region->get_bridges
	  -----------^

Replace them by :c:expr:, with does what's desired.

Reviewed-by: default avatarMoritz Fischer <mdf@kernel.org>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 4d9d18ad

Documentation/driver-api/fpga/fpga-mgr.rst

+1 −1
Original line number Diff line number Diff line
@@ -101,7 +101,7 @@ in state. 
API for implementing a new FPGA Manager driver

----------------------------------------------



* ``fpga_mgr_states`` —  Values for :c:member:`fpga_manager->state`.

* ``fpga_mgr_states`` —  Values for :c:expr:`fpga_manager->state`.

* struct fpga_manager —  the FPGA manager struct

* struct fpga_manager_ops —  Low level FPGA manager driver ops

* devm_fpga_mgr_create() —  Allocate and init a manager struct

Documentation/driver-api/fpga/fpga-programming.rst

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ the FPGA manager and bridges. It will: 
 * lock the mutex of the region's FPGA manager

 * build a list of FPGA bridges if a method has been specified to do so

 * disable the bridges

 * program the FPGA using info passed in :c:member:`fpga_region->info`.

 * program the FPGA using info passed in :c:expr:`fpga_region->info`.

 * re-enable the bridges

 * release the locks

Documentation/driver-api/fpga/fpga-region.rst

+2 −2
Original line number Diff line number Diff line
@@ -61,9 +61,9 @@ during the region's probe function. 


The FPGA region will need to specify which bridges to control while programming

the FPGA.  The region driver can build a list of bridges during probe time

(:c:member:`fpga_region->bridge_list`) or it can have a function that creates

(:c:expr:`fpga_region->bridge_list`) or it can have a function that creates

the list of bridges to program just before programming

(:c:member:`fpga_region->get_bridges`).  The FPGA bridge framework supplies the

(:c:expr:`fpga_region->get_bridges`).  The FPGA bridge framework supplies the

following APIs to handle building or tearing down that list.



* fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a

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