Commit 64d20b77 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'qcom-drivers-for-4.20' of... 

Merge tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Qualcomm ARM Based Driver Updates for v4.20

* Refactor of SCM compatibles and clock requirements
* SMEM cleanup
* Add LLCC EDAC driver
* Fixes for GENI clocks and macros
* Fix includes for llcc-slice and smem
* String overflow fixes for APR and wcnss_ctrl
* Fixup for COMPILE_TEST of qcom driver Kconfigs
* Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p
* Add SCM dependencies to SPM and rmtfs-mem

* tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux

: (38 commits)
  soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples
  soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get()
  soc: qcom: geni: Make version macros simpler
  dt-bindings: firmware: scm: Add MSM8998 and SDM845
  firmware: qcom: scm: Refactor clock handling
  dt-bindings: firmware: scm: Refactor compatibles and clocks
  soc: qcom: smem: a few last cleanups
  soc: qcom: smem: verify partition host ids match
  soc: qcom: smem: small change in global entry loop
  soc: qcom: smem: verify partition offset_free_uncached
  soc: qcom: smem: verify partition header size
  soc: qcom: smem: introduce qcom_smem_partition_header()
  soc: qcom: smem: require order of host ids to match
  soc: qcom: smem: verify both host ids in partition header
  soc: qcom: smem: small refactor in qcom_smem_enumerate_partitions()
  soc: qcom: smem: always ignore partitions with 0 offset or size
  soc: qcom: smem: initialize region struct only when successful
  soc: qcom: smem: rename variable in qcom_smem_get_global()
  drivers: qcom: rpmh-rsc: clear wait_for_compl after use
  soc: qcom: rmtfs-mem: Validate that scm is available
  ...

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 68b679b3 579fde69

Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt

+17 −2
Original line number Diff line number Diff line
@@ -16,11 +16,26 @@ Properties: 
- reg:

	Usage: required

	Value Type: <prop-encoded-array>

	Definition: Start address and the the size of the register region.

	Definition: The first element specifies the llcc base start address and

		    the size of the register region. The second element specifies

		    the llcc broadcast base address and size of the register region.



- reg-names:

        Usage: required

        Value Type: <stringlist>

        Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base".



- interrupts:

	Usage: required

	Definition: The interrupt is associated with the llcc edac device.

			It's used for llcc cache single and double bit error detection

			and reporting.



Example:



	cache-controller@1100000 {

		compatible = "qcom,sdm845-llcc";

		reg = <0x1100000 0x250000>;

		reg = <0x1100000 0x200000>, <0x1300000 0x50000> ;

		reg-names = "llcc_base", "llcc_broadcast_base";

		interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;

	};

Documentation/devicetree/bindings/firmware/qcom,scm.txt

+21 −12
Original line number Diff line number Diff line
@@ -7,16 +7,23 @@ assorted actions. 


Required properties:

- compatible: must contain one of the following:

 * "qcom,scm-apq8064" for APQ8064 platforms

 * "qcom,scm-msm8660" for MSM8660 platforms

 * "qcom,scm-msm8690" for MSM8690 platforms

 * "qcom,scm-msm8996" for MSM8996 platforms

 * "qcom,scm-ipq4019" for IPQ4019 platforms

 * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc)

- clocks: One to three clocks may be required based on compatible.

 * No clock required for "qcom,scm-msm8996", "qcom,scm-ipq4019"

 * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960"

 * Core, iface, and bus clocks required for "qcom,scm"

 * "qcom,scm-apq8064"

 * "qcom,scm-apq8084"

 * "qcom,scm-msm8660"

 * "qcom,scm-msm8916"

 * "qcom,scm-msm8960"

 * "qcom,scm-msm8974"

 * "qcom,scm-msm8996"

 * "qcom,scm-msm8998"

 * "qcom,scm-ipq4019"

 * "qcom,scm-sdm845"

 and:

 * "qcom,scm"

- clocks: Specifies clocks needed by the SCM interface, if any:

 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and

   "qcom,scm-msm8960"

 * core, iface and bus clocks required for "qcom,scm-apq8084",

   "qcom,scm-msm8916" and "qcom,scm-msm8974"

- clock-names: Must contain "core" for the core clock, "iface" for the interface

  clock and "bus" for the bus clock per the requirements of the compatible.

- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
@@ -26,8 +33,10 @@ Example for MSM8916: 


	firmware {

		scm {

			compatible = "qcom,scm";

			clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;

			compatible = "qcom,msm8916", "qcom,scm";

			clocks = <&gcc GCC_CRYPTO_CLK> ,

				 <&gcc GCC_CRYPTO_AXI_CLK>,

				 <&gcc GCC_CRYPTO_AHB_CLK>;

			clock-names = "core", "bus", "iface";

		};

	};

MAINTAINERS

+8 −0
Original line number Diff line number Diff line
@@ -5347,6 +5347,14 @@ L: linux-edac@vger.kernel.org 
S:	Maintained

F:	drivers/edac/ti_edac.c



EDAC-QCOM

M:	Channagoud Kadabi <ckadabi@codeaurora.org>

M:	Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>

L:	linux-arm-msm@vger.kernel.org

L:	linux-edac@vger.kernel.org

S:	Maintained

F:	drivers/edac/qcom_edac.c



EDIROL UA-101/UA-1000 DRIVER

M:	Clemens Ladisch <clemens@ladisch.de>

L:	alsa-devel@alsa-project.org (moderated for non-subscribers)

drivers/edac/Kconfig

+14 −0
Original line number Diff line number Diff line
@@ -460,4 +460,18 @@ config EDAC_TI 
	  Support for error detection and correction on the

          TI SoCs.



config EDAC_QCOM

	tristate "QCOM EDAC Controller"

	depends on ARCH_QCOM && QCOM_LLCC

	help

	  Support for error detection and correction on the

	  Qualcomm Technologies, Inc. SoCs.



	  This driver reports Single Bit Errors (SBEs) and Double Bit Errors (DBEs).

	  As of now, it supports error reporting for Last Level Cache Controller (LLCC)

	  of Tag RAM and Data RAM.



	  For debugging issues having to do with stability and overall system

	  health, you should probably say 'Y' here.



endif # EDAC

drivers/edac/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -77,3 +77,4 @@ obj-$(CONFIG_EDAC_ALTERA) += altera_edac.o 
obj-$(CONFIG_EDAC_SYNOPSYS)		+= synopsys_edac.o

obj-$(CONFIG_EDAC_XGENE)		+= xgene_edac.o

obj-$(CONFIG_EDAC_TI)			+= ti_edac.o

obj-$(CONFIG_EDAC_QCOM)			+= qcom_edac.o

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