Commit 64c672ae authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/pwr: implement a simple i2c stack 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 2e9dfe23

drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/i2c_.fuc

0 → 100644
+393 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2013 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs

 */



#define T_TIMEOUT  2200000

#define T_RISEFALL 1000

#define T_HOLD     5000



#ifdef INCLUDE_PROC

process(PROC_I2C_, #i2c_init, #i2c_recv)

#endif



/******************************************************************************

 * I2C_ data segment

 *****************************************************************************/

#ifdef INCLUDE_DATA

i2c_scl_map:

.b32 NV_PPWR_OUTPUT_I2C_0_SCL

.b32 NV_PPWR_OUTPUT_I2C_1_SCL

.b32 NV_PPWR_OUTPUT_I2C_2_SCL

.b32 NV_PPWR_OUTPUT_I2C_3_SCL

.b32 NV_PPWR_OUTPUT_I2C_4_SCL

.b32 NV_PPWR_OUTPUT_I2C_5_SCL

.b32 NV_PPWR_OUTPUT_I2C_6_SCL

.b32 NV_PPWR_OUTPUT_I2C_7_SCL

.b32 NV_PPWR_OUTPUT_I2C_8_SCL

.b32 NV_PPWR_OUTPUT_I2C_9_SCL

i2c_sda_map:

.b32 NV_PPWR_OUTPUT_I2C_0_SDA

.b32 NV_PPWR_OUTPUT_I2C_1_SDA

.b32 NV_PPWR_OUTPUT_I2C_2_SDA

.b32 NV_PPWR_OUTPUT_I2C_3_SDA

.b32 NV_PPWR_OUTPUT_I2C_4_SDA

.b32 NV_PPWR_OUTPUT_I2C_5_SDA

.b32 NV_PPWR_OUTPUT_I2C_6_SDA

.b32 NV_PPWR_OUTPUT_I2C_7_SDA

.b32 NV_PPWR_OUTPUT_I2C_8_SDA

.b32 NV_PPWR_OUTPUT_I2C_9_SDA

#if NVKM_PPWR_CHIPSET < GF119

i2c_ctrl:

.b32 0x00e138

.b32 0x00e150

.b32 0x00e168

.b32 0x00e180

.b32 0x00e254

.b32 0x00e274

.b32 0x00e764

.b32 0x00e780

.b32 0x00e79c

.b32 0x00e7b8

#endif

#endif



/******************************************************************************

 * I2C_ code segment

 *****************************************************************************/

#ifdef INCLUDE_CODE



// $r3  - value

// $r2  - sda line

// $r1  - scl line

// $r0  - zero

i2c_drive_scl:

	cmp b32 $r3 0

	bra e #i2c_drive_scl_lo

	nv_iowr(NV_PPWR_OUTPUT_SET, $r1)

	ret

	i2c_drive_scl_lo:

	nv_iowr(NV_PPWR_OUTPUT_CLR, $r1)

	ret



i2c_drive_sda:

	cmp b32 $r3 0

	bra e #i2c_drive_sda_lo

	nv_iowr(NV_PPWR_OUTPUT_SET, $r2)

	ret

	i2c_drive_sda_lo:

	nv_iowr(NV_PPWR_OUTPUT_CLR, $r2)

	ret



i2c_sense_scl:

	bclr $flags $p1

	nv_iord($r3, NV_PPWR_INPUT)

	and $r3 $r1

	bra z #i2c_sense_scl_done

		bset $flags $p1

	i2c_sense_scl_done:

	ret



i2c_sense_sda:

	bclr $flags $p1

	nv_iord($r3, NV_PPWR_INPUT)

	and $r3 $r2

	bra z #i2c_sense_sda_done

		bset $flags $p1

	i2c_sense_sda_done:

	ret



#define i2c_drive_scl(v) /*

*/	mov $r3 (v) /*

*/	call(i2c_drive_scl)

#define i2c_drive_sda(v) /*

*/	mov $r3 (v) /*

*/	call(i2c_drive_sda)

#define i2c_sense_scl() /*

*/	call(i2c_sense_scl)

#define i2c_sense_sda() /*

*/	call(i2c_sense_sda)

#define i2c_delay(v) /*

*/	mov $r14 (v) /*

*/	call(nsec)



#define i2c_trace_init() /*

*/	imm32($r6, 0x10000000) /*

*/	sub b32 $r7 $r6 1 /*

*/

#define i2c_trace_down() /*

*/	shr b32 $r6 4 /*

*/	push $r5 /*

*/	shl b32 $r5 $r6 4 /*

*/	sub b32 $r5 $r6 /*

*/	not b32 $r5 /*

*/	and $r7 $r5 /*

*/	pop $r5 /*

*/

#define i2c_trace_exit() /*

*/	shl b32 $r6 4 /*

*/

#define i2c_trace_next() /*

*/	add b32 $r7 $r6 /*

*/

#define i2c_trace_call(func) /*

*/	i2c_trace_next() /*

*/	i2c_trace_down() /*

*/	call(func) /*

*/	i2c_trace_exit() /*

*/



i2c_raise_scl:

	push $r4

	mov $r4 (T_TIMEOUT / T_RISEFALL)

	i2c_drive_scl(1)

	i2c_raise_scl_wait:

		i2c_delay(T_RISEFALL)

		i2c_sense_scl()

		bra $p1 #i2c_raise_scl_done

		sub b32 $r4 1

		bra nz #i2c_raise_scl_wait

	i2c_raise_scl_done:

	pop $r4

	ret



i2c_start:

	i2c_sense_scl()

	bra not $p1 #i2c_start_rep

	i2c_sense_sda()

	bra not $p1 #i2c_start_rep

	bra #i2c_start_send

	i2c_start_rep:

		i2c_drive_scl(0)

		i2c_drive_sda(1)

		i2c_trace_call(i2c_raise_scl)

		bra not $p1 #i2c_start_out

	i2c_start_send:

	i2c_drive_sda(0)

	i2c_delay(T_HOLD)

	i2c_drive_scl(0)

	i2c_delay(T_HOLD)

	i2c_start_out:

	ret



i2c_stop:

	i2c_drive_scl(0)

	i2c_drive_sda(0)

	i2c_delay(T_RISEFALL)

	i2c_drive_scl(1)

	i2c_delay(T_HOLD)

	i2c_drive_sda(1)

	i2c_delay(T_HOLD)

	ret



// $r3  - value

// $r2  - sda line

// $r1  - scl line

// $r0  - zero

i2c_bitw:

	call(i2c_drive_sda)

	i2c_delay(T_RISEFALL)

	i2c_trace_call(i2c_raise_scl)

	bra not $p1 #i2c_bitw_out

	i2c_delay(T_HOLD)

	i2c_drive_scl(0)

	i2c_delay(T_HOLD)

	i2c_bitw_out:

	ret



// $r3  - value (out)

// $r2  - sda line

// $r1  - scl line

// $r0  - zero

i2c_bitr:

	i2c_drive_sda(1)

	i2c_delay(T_RISEFALL)

	i2c_trace_call(i2c_raise_scl)

	bra not $p1 #i2c_bitr_done

	i2c_sense_sda()

	i2c_drive_scl(0)

	i2c_delay(T_HOLD)

	xbit $r3 $flags $p1

	bset $flags $p1

	i2c_bitr_done:

	ret



i2c_get_byte:

	mov $r5 0

	mov $r4 8

	i2c_get_byte_next:

		shl b32 $r5 1

		i2c_trace_call(i2c_bitr)

		bra not $p1 #i2c_get_byte_done

		or $r5 $r3

		sub b32 $r4 1

		bra nz #i2c_get_byte_next

	mov $r3 1

	i2c_trace_call(i2c_bitw)

	i2c_get_byte_done:

	ret



i2c_put_byte:

	mov $r4 8

	i2c_put_byte_next:

		sub b32 $r4 1

		xbit $r3 $r5 $r4

		i2c_trace_call(i2c_bitw)

		bra not $p1 #i2c_put_byte_done

		cmp b32 $r4 0

		bra ne #i2c_put_byte_next

	i2c_trace_call(i2c_bitr)

	bra not $p1 #i2c_put_byte_done

	i2c_trace_next()

	cmp b32 $r3 1

	bra ne #i2c_put_byte_done

	bclr $flags $p1	// nack

	i2c_put_byte_done:

	ret



i2c_addr:

	i2c_trace_call(i2c_start)

	bra not $p1 #i2c_addr_done

	extr $r3 $r12 I2C__MSG_DATA0_ADDR

	shl b32 $r3 1

	or $r5 $r3

	i2c_trace_call(i2c_put_byte)

	i2c_addr_done:

	ret



i2c_acquire_addr:

	extr $r14 $r12 I2C__MSG_DATA0_PORT

#if NVKM_PPWR_CHIPSET < GF119

	shl b32 $r14 2

	add b32 $r14 #i2c_ctrl

	ld b32 $r14 D[$r14]

#else

	shl b32 $r14 5

	add b32 $r14 0x00d014

#endif

	ret



i2c_acquire:

	call(i2c_acquire_addr)

	call(rd32)

	bset $r13 3

	call(wr32)

	ret



i2c_release:

	call(i2c_acquire_addr)

	call(rd32)

	bclr $r13 3

	call(wr32)

	ret



// description

//

// $r15 - current (i2c)

// $r14 - sender process name

// $r13 - message

// $r12 - data0

// $r11 - data1

// $r0  - zero

i2c_recv:

	bclr $flags $p1

	extr $r1 $r12 I2C__MSG_DATA0_PORT

	shl b32 $r1 2

	cmp b32 $r1 (#i2c_sda_map - #i2c_scl_map)

	bra ge #i2c_recv_done

	add b32 $r3 $r1 #i2c_sda_map

	ld b32 $r2 D[$r3]

	add b32 $r3 $r1 #i2c_scl_map

	ld b32 $r1 D[$r3]



	bset $flags $p2

	push $r13

	push $r14



	push $r13

	i2c_trace_init()

	i2c_trace_call(i2c_acquire)

	pop $r13



	cmp b32 $r13 I2C__MSG_RD08

	bra ne #i2c_recv_not_rd08

		mov $r5 0

		i2c_trace_call(i2c_addr)

		bra not $p1 #i2c_recv_done

		extr $r5 $r12 I2C__MSG_DATA0_RD08_REG

		i2c_trace_call(i2c_put_byte)

		bra not $p1 #i2c_recv_done

		mov $r5 1

		i2c_trace_call(i2c_addr)

		bra not $p1 #i2c_recv_done

		i2c_trace_call(i2c_get_byte)

		bra not $p1 #i2c_recv_done

		ins $r11 $r5 I2C__MSG_DATA1_RD08_VAL

		i2c_trace_call(i2c_stop)

		mov b32 $r11 $r5

		clear b32 $r7

		bra #i2c_recv_done



	i2c_recv_not_rd08:

	cmp b32 $r13 I2C__MSG_WR08

	bra ne #i2c_recv_not_wr08

		mov $r5 0

		call(i2c_addr)

		bra not $p1 #i2c_recv_done

		extr $r5 $r12 I2C__MSG_DATA0_WR08_REG

		call(i2c_put_byte)

		bra not $p1 #i2c_recv_done

		mov $r5 0

		call(i2c_addr)

		bra not $p1 #i2c_recv_done

		extr $r5 $r11 I2C__MSG_DATA1_WR08_VAL

		call(i2c_put_byte)

		bra not $p1 #i2c_recv_done

		call(i2c_stop)

		clear b32 $r7

		extr $r5 $r12 I2C__MSG_DATA0_WR08_SYNC

		bra nz #i2c_recv_done

		bclr $flags $p2

		bra #i2c_recv_done



	i2c_recv_not_wr08:



	i2c_recv_done:

	extr $r14 $r12 I2C__MSG_DATA0_PORT

	call(i2c_release)



	pop $r14

	pop $r13

	bra not $p2 #i2c_recv_exit

	mov b32 $r12 $r7

	call(send)



	i2c_recv_exit:

	ret



// description

//

// $r15 - current (i2c)

// $r0  - zero

i2c_init:

	ret

#endif

drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/macros.fuc

+53 −0
Original line number Diff line number Diff line
@@ -83,6 +83,50 @@ 
#define NV_PPWR_MMIO_CTRL_OP_WR                                      0x00000002

#define NV_PPWR_OUTPUT                                                   0x07c0

#define NV_PPWR_OUTPUT_FB_PAUSE                                      0x00000004

#if NVKM_PPWR_CHIPSET < GF119

#define NV_PPWR_OUTPUT_I2C_3_SCL                                     0x00000100

#define NV_PPWR_OUTPUT_I2C_3_SDA                                     0x00000200

#define NV_PPWR_OUTPUT_I2C_0_SCL                                     0x00001000

#define NV_PPWR_OUTPUT_I2C_0_SDA                                     0x00002000

#define NV_PPWR_OUTPUT_I2C_1_SCL                                     0x00004000

#define NV_PPWR_OUTPUT_I2C_1_SDA                                     0x00008000

#define NV_PPWR_OUTPUT_I2C_2_SCL                                     0x00010000

#define NV_PPWR_OUTPUT_I2C_2_SDA                                     0x00020000

#define NV_PPWR_OUTPUT_I2C_4_SCL                                     0x00040000

#define NV_PPWR_OUTPUT_I2C_4_SDA                                     0x00080000

#define NV_PPWR_OUTPUT_I2C_5_SCL                                     0x00100000

#define NV_PPWR_OUTPUT_I2C_5_SDA                                     0x00200000

#define NV_PPWR_OUTPUT_I2C_6_SCL                                     0x00400000

#define NV_PPWR_OUTPUT_I2C_6_SDA                                     0x00800000

#define NV_PPWR_OUTPUT_I2C_7_SCL                                     0x01000000

#define NV_PPWR_OUTPUT_I2C_7_SDA                                     0x02000000

#define NV_PPWR_OUTPUT_I2C_8_SCL                                     0x04000000

#define NV_PPWR_OUTPUT_I2C_8_SDA                                     0x08000000

#define NV_PPWR_OUTPUT_I2C_9_SCL                                     0x10000000

#define NV_PPWR_OUTPUT_I2C_9_SDA                                     0x20000000

#else

#define NV_PPWR_OUTPUT_I2C_0_SCL                                     0x00000400

#define NV_PPWR_OUTPUT_I2C_1_SCL                                     0x00000800

#define NV_PPWR_OUTPUT_I2C_2_SCL                                     0x00001000

#define NV_PPWR_OUTPUT_I2C_3_SCL                                     0x00002000

#define NV_PPWR_OUTPUT_I2C_4_SCL                                     0x00004000

#define NV_PPWR_OUTPUT_I2C_5_SCL                                     0x00008000

#define NV_PPWR_OUTPUT_I2C_6_SCL                                     0x00010000

#define NV_PPWR_OUTPUT_I2C_7_SCL                                     0x00020000

#define NV_PPWR_OUTPUT_I2C_8_SCL                                     0x00040000

#define NV_PPWR_OUTPUT_I2C_9_SCL                                     0x00080000

#define NV_PPWR_OUTPUT_I2C_0_SDA                                     0x00100000

#define NV_PPWR_OUTPUT_I2C_1_SDA                                     0x00200000

#define NV_PPWR_OUTPUT_I2C_2_SDA                                     0x00400000

#define NV_PPWR_OUTPUT_I2C_3_SDA                                     0x00800000

#define NV_PPWR_OUTPUT_I2C_4_SDA                                     0x01000000

#define NV_PPWR_OUTPUT_I2C_5_SDA                                     0x02000000

#define NV_PPWR_OUTPUT_I2C_6_SDA                                     0x04000000

#define NV_PPWR_OUTPUT_I2C_7_SDA                                     0x08000000

#define NV_PPWR_OUTPUT_I2C_8_SDA                                     0x10000000

#define NV_PPWR_OUTPUT_I2C_9_SDA                                     0x20000000

#endif

#define NV_PPWR_INPUT                                                    0x07c4

#define NV_PPWR_OUTPUT_SET                                               0x07e0

#define NV_PPWR_OUTPUT_SET_FB_PAUSE                                  0x00000004

#define NV_PPWR_OUTPUT_CLR                                               0x07e4
@@ -125,6 +169,15 @@ 
*/	.b32 0 /*

*/	.skip 64



#if NV_PPWR_CHIPSET < GK208

#define imm32(reg,val) /*

*/	movw reg  ((val) & 0x0000ffff) /*

*/	sethi reg ((val) & 0xffff0000)

#else

#define imm32(reg,val) /*

*/	mov reg (val)

#endif



#ifndef NVKM_FALCON_UNSHIFTED_IO

#define nv_iord(reg,ior) /*

*/	mov reg ior /*

drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nv108.fuc

+3 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 
#include "host.fuc"

#include "memx.fuc"

#include "perf.fuc"

#include "i2c_.fuc"

#include "test.fuc"

#include "idle.fuc"

#undef INCLUDE_PROC
@@ -46,6 +47,7 @@ 
#include "host.fuc"

#include "memx.fuc"

#include "perf.fuc"

#include "i2c_.fuc"

#include "test.fuc"

#include "idle.fuc"

#undef INCLUDE_DATA
@@ -57,6 +59,7 @@ 
#include "host.fuc"

#include "memx.fuc"

#include "perf.fuc"

#include "i2c_.fuc"

#include "test.fuc"

#include "idle.fuc"

#undef INCLUDE_CODE

drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nv108.fuc.h

+369 −74
Original line number Diff line number Diff line
@@ -89,16 +89,9 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

	0x54534554,

	0x00000494,

	0x00000475,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x5f433249,

	0x00000877,

	0x0000071e,

	0x00000000,

	0x00000000,

	0x00000000,
@@ -111,15 +104,6 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

	0x454c4449,

	0x0000049f,

	0x0000049d,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,
@@ -127,18 +111,17 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

	0x54534554,

	0x00000898,

	0x00000879,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

/* 0x0210: proc_list_tail */

/* 0x0210: time_prev */

	0x00000000,

/* 0x0214: time_next */

	0x00000000,

/* 0x0218: fifo_queue */

	0x00000000,

	0x00000000,

	0x00000000,
@@ -150,6 +133,9 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

	0x454c4449,

	0x000008a3,

	0x000008a1,

	0x00000000,

	0x00000000,

	0x00000000,
@@ -169,9 +155,12 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

/* 0x0268: proc_list_tail */

/* 0x0268: time_prev */

	0x00000000,

/* 0x026c: time_next */

	0x00000000,

/* 0x0298: rfifo_queue */

/* 0x0270: fifo_queue */

	0x00000000,

	0x00000000,

	0x00000000,
@@ -204,31 +193,7 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

/* 0x0318: memx_func_head */

	0x00010000,

	0x00000000,

	0x000003a9,

/* 0x0324: memx_func_next */

	0x00000001,

	0x00000000,

	0x000003c7,

	0x00000002,

	0x00000002,

	0x000003df,

	0x00040003,

	0x00000000,

	0x00000407,

	0x00010004,

	0x00000000,

	0x00000421,

/* 0x0354: memx_func_tail */

/* 0x0354: memx_data_head */

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

/* 0x02f0: rfifo_queue */

	0x00000000,

	0x00000000,

	0x00000000,
@@ -261,10 +226,25 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

/* 0x0370: memx_func_head */

	0x00010000,

	0x00000000,

	0x000003a9,

/* 0x037c: memx_func_next */

	0x00000001,

	0x00000000,

	0x000003c7,

	0x00000002,

	0x00000002,

	0x000003df,

	0x00040003,

	0x00000000,

	0x00000407,

	0x00010004,

	0x00000000,

	0x00000421,

/* 0x03ac: memx_func_tail */

/* 0x03ac: memx_data_head */

	0x00000000,

	0x00000000,

	0x00000000,
@@ -735,7 +715,6 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

/* 0x0b54: memx_data_tail */

	0x00000000,

	0x00000000,

	0x00000000,
@@ -778,6 +757,29 @@ uint32_t nv108_pwr_data[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

/* 0x0bac: memx_data_tail */

/* 0x0bac: i2c_scl_map */

	0x00000400,

	0x00000800,

	0x00001000,

	0x00002000,

	0x00004000,

	0x00008000,

	0x00010000,

	0x00020000,

	0x00040000,

	0x00080000,

/* 0x0bd4: i2c_sda_map */

	0x00100000,

	0x00200000,

	0x00400000,

	0x00800000,

	0x01000000,

	0x02000000,

	0x04000000,

	0x08000000,

	0x10000000,

	0x20000000,

	0x00000000,

};
@@ -832,20 +834,20 @@ uint32_t nv108_pwr_code[] = { 
	0x03e99800,

	0xf40096b0,

	0x0a98280b,

	0x029abb84,

	0x029abb9a,

	0x0d0e1cf4,

	0x01de7e01,

	0xf494bd00,

/* 0x00b2: intr_watchdog_next_time */

	0x0a98140e,

	0x00a6b085,

	0x00a6b09b,

	0xa6080bf4,

	0x061cf49a,

/* 0x00c0: intr_watchdog_next_time_set */

/* 0x00c3: intr_watchdog_next_proc */

	0xb58509b5,

	0xb59b09b5,

	0xe0b603e9,

	0x10e6b158,

	0x68e6b158,

	0xc81bf402,

/* 0x00d2: intr */

	0x00f900f8,
@@ -862,15 +864,15 @@ uint32_t nv108_pwr_code[] = { 
	0x080804bd,

	0xc40088cf,

	0x0bf40289,

	0x8500b51f,

	0x9b00b51f,

	0x957e580e,

	0x09980000,

	0x0096b085,

	0x0096b09b,

	0x000d0bf4,

	0x0009f634,

	0x09b504bd,

/* 0x0125: intr_skip_watchdog */

	0x0089e484,

	0x0089e49a,

	0x360bf408,

	0xcf068849,

	0x9ac40099,
@@ -918,7 +920,7 @@ uint32_t nv108_pwr_code[] = { 
/* 0x01c6: timer_reset */

	0x3400161e,

	0xbd000ef6,

	0x840eb504,

	0x9a0eb504,

/* 0x01d0: timer_enable */

	0x38000108,

	0xbd0008f6,
@@ -949,7 +951,7 @@ uint32_t nv108_pwr_code[] = { 
	0xa6008a98,

	0x100bf4ae,

	0xb15880b6,

	0xf4021086,

	0xf4026886,

	0x32f4f11b,

/* 0x0239: find_done */

	0xfc8eb201,
@@ -1009,7 +1011,7 @@ uint32_t nv108_pwr_code[] = { 
	0x0bf412a6,

	0x071ec42e,

	0xb704ee94,

	0x980218e0,

	0x980270e0,

	0xec9803eb,

	0x01ed9802,

	0x7e00ee98,
@@ -1031,7 +1033,7 @@ uint32_t nv108_pwr_code[] = { 
	0xf412a608,

	0x23c4ef0b,

	0x0434b607,

	0x029830b7,

	0x02f030b7,

	0xb5033bb5,

	0x3db5023c,

	0x003eb501,
@@ -1044,11 +1046,11 @@ uint32_t nv108_pwr_code[] = { 
/* 0x0379: host_init */

	0x00804100,

	0xf11014b6,

	0x40021815,

	0x40027015,

	0x01f604d0,

	0x4104bd00,

	0x14b60080,

	0x9815f110,

	0xf015f110,

	0x04dc4002,

	0xbd0001f6,

	0x40010104,
@@ -1101,13 +1103,13 @@ uint32_t nv108_pwr_code[] = { 
	0x001398b2,

	0x950410b6,

	0x30f01034,

	0xc835980c,

	0xde35980c,

	0x12a655f9,

	0xfced1ef4,

	0x7ee0fcd0,

	0xf800023f,

/* 0x0455: memx_info */

	0x03544c00,

	0x03ac4c00,

	0x7e08004b,

	0xf800023f,

/* 0x0461: memx_recv */
@@ -1119,7 +1121,301 @@ uint32_t nv108_pwr_code[] = { 
/* 0x0471: perf_recv */

/* 0x0473: perf_init */

	0xf800f800,

/* 0x0475: test_recv */

/* 0x0475: i2c_drive_scl */

	0x0036b000,

	0x400d0bf4,

	0x01f607e0,

	0xf804bd00,

/* 0x0485: i2c_drive_scl_lo */

	0x07e44000,

	0xbd0001f6,

/* 0x048f: i2c_drive_sda */

	0xb000f804,

	0x0bf40036,

	0x07e0400d,

	0xbd0002f6,

/* 0x049f: i2c_drive_sda_lo */

	0x4000f804,

	0x02f607e4,

	0xf804bd00,

/* 0x04a9: i2c_sense_scl */

	0x0132f400,

	0xcf07c443,

	0x31fd0033,

	0x060bf404,

/* 0x04bb: i2c_sense_scl_done */

	0xf80131f4,

/* 0x04bd: i2c_sense_sda */

	0x0132f400,

	0xcf07c443,

	0x32fd0033,

	0x060bf404,

/* 0x04cf: i2c_sense_sda_done */

	0xf80131f4,

/* 0x04d1: i2c_raise_scl */

	0x4440f900,

	0x01030898,

	0x0004757e,

/* 0x04dc: i2c_raise_scl_wait */

	0x7e03e84e,

	0x7e00005d,

	0xf40004a9,

	0x42b60901,

	0xef1bf401,

/* 0x04f0: i2c_raise_scl_done */

	0x00f840fc,

/* 0x04f4: i2c_start */

	0x0004a97e,

	0x7e0d11f4,

	0xf40004bd,

	0x0ef40611,

/* 0x0505: i2c_start_rep */

	0x7e00032e,

	0x03000475,

	0x048f7e01,

	0x0076bb00,

	0xf90465b6,

	0x04659450,

	0xbd0256bb,

	0x0475fd50,

	0xd17e50fc,

	0x64b60004,

	0x1d11f404,

/* 0x0530: i2c_start_send */

	0x8f7e0003,

	0x884e0004,

	0x005d7e13,

	0x7e000300,

	0x4e000475,

	0x5d7e1388,

/* 0x054a: i2c_start_out */

	0x00f80000,

/* 0x054c: i2c_stop */

	0x757e0003,

	0x00030004,

	0x00048f7e,

	0x7e03e84e,

	0x0300005d,

	0x04757e01,

	0x13884e00,

	0x00005d7e,

	0x8f7e0103,

	0x884e0004,

	0x005d7e13,

/* 0x057b: i2c_bitw */

	0x7e00f800,

	0x4e00048f,

	0x5d7e03e8,

	0x76bb0000,

	0x0465b600,

	0x659450f9,

	0x0256bb04,

	0x75fd50bd,

	0x7e50fc04,

	0xb60004d1,

	0x11f40464,

	0x13884e17,

	0x00005d7e,

	0x757e0003,

	0x884e0004,

	0x005d7e13,

/* 0x05b9: i2c_bitw_out */

/* 0x05bb: i2c_bitr */

	0x0300f800,

	0x048f7e01,

	0x03e84e00,

	0x00005d7e,

	0xb60076bb,

	0x50f90465,

	0xbb046594,

	0x50bd0256,

	0xfc0475fd,

	0x04d17e50,

	0x0464b600,

	0x7e1a11f4,

	0x030004bd,

	0x04757e00,

	0x13884e00,

	0x00005d7e,

	0xf4013cf0,

/* 0x05fe: i2c_bitr_done */

	0x00f80131,

/* 0x0600: i2c_get_byte */

	0x08040005,

/* 0x0604: i2c_get_byte_next */

	0xbb0154b6,

	0x65b60076,

	0x9450f904,

	0x56bb0465,

	0xfd50bd02,

	0x50fc0475,

	0x0005bb7e,

	0xf40464b6,

	0x53fd2a11,

	0x0142b605,

	0x03d81bf4,

	0x0076bb01,

	0xf90465b6,

	0x04659450,

	0xbd0256bb,

	0x0475fd50,

	0x7b7e50fc,

	0x64b60005,

/* 0x064d: i2c_get_byte_done */

/* 0x064f: i2c_put_byte */

	0x0400f804,

/* 0x0651: i2c_put_byte_next */

	0x0142b608,

	0xbb3854ff,

	0x65b60076,

	0x9450f904,

	0x56bb0465,

	0xfd50bd02,

	0x50fc0475,

	0x00057b7e,

	0xf40464b6,

	0x46b03411,

	0xd81bf400,

	0xb60076bb,

	0x50f90465,

	0xbb046594,

	0x50bd0256,

	0xfc0475fd,

	0x05bb7e50,

	0x0464b600,

	0xbb0f11f4,

	0x36b00076,

	0x061bf401,

/* 0x06a7: i2c_put_byte_done */

	0xf80132f4,

/* 0x06a9: i2c_addr */

	0x0076bb00,

	0xf90465b6,

	0x04659450,

	0xbd0256bb,

	0x0475fd50,

	0xf47e50fc,

	0x64b60004,

	0x2911f404,

	0x012ec3e7,

	0xfd0134b6,

	0x76bb0553,

	0x0465b600,

	0x659450f9,

	0x0256bb04,

	0x75fd50bd,

	0x7e50fc04,

	0xb600064f,

/* 0x06ee: i2c_addr_done */

	0x00f80464,

/* 0x06f0: i2c_acquire_addr */

	0xb6f8cec7,

	0xe0b705e4,

	0x00f8d014,

/* 0x06fc: i2c_acquire */

	0x0006f07e,

	0x0000047e,

	0x7e03d9f0,

	0xf800002e,

/* 0x070d: i2c_release */

	0x06f07e00,

	0x00047e00,

	0x03daf000,

	0x00002e7e,

/* 0x071e: i2c_recv */

	0x32f400f8,

	0xf8c1c701,

	0xb00214b6,

	0x1ff52816,

	0x13b80137,

	0x98000bd4,

	0x13b80032,

	0x98000bac,

	0x31f40031,

	0xf9d0f902,

	0xf1d0f9e0,

	0xf1000067,

	0x92100063,

	0x76bb0167,

	0x0465b600,

	0x659450f9,

	0x0256bb04,

	0x75fd50bd,

	0x7e50fc04,

	0xb60006fc,

	0xd0fc0464,

	0xf500d6b0,

	0x0500b01b,

	0x0076bb00,

	0xf90465b6,

	0x04659450,

	0xbd0256bb,

	0x0475fd50,

	0xa97e50fc,

	0x64b60006,

	0xcc11f504,

	0xe0c5c700,

	0xb60076bb,

	0x50f90465,

	0xbb046594,

	0x50bd0256,

	0xfc0475fd,

	0x064f7e50,

	0x0464b600,

	0x00a911f5,

	0x76bb0105,

	0x0465b600,

	0x659450f9,

	0x0256bb04,

	0x75fd50bd,

	0x7e50fc04,

	0xb60006a9,

	0x11f50464,

	0x76bb0087,

	0x0465b600,

	0x659450f9,

	0x0256bb04,

	0x75fd50bd,

	0x7e50fc04,

	0xb6000600,

	0x11f40464,

	0xe05bcb67,

	0xb60076bb,

	0x50f90465,

	0xbb046594,

	0x50bd0256,

	0xfc0475fd,

	0x054c7e50,

	0x0464b600,

	0x74bd5bb2,

/* 0x0823: i2c_recv_not_rd08 */

	0xb0410ef4,

	0x1bf401d6,

	0x7e00053b,

	0xf40006a9,

	0xc5c73211,

	0x064f7ee0,

	0x2811f400,

	0xa97e0005,

	0x11f40006,

	0xe0b5c71f,

	0x00064f7e,

	0x7e1511f4,

	0xbd00054c,

	0x08c5c774,

	0xf4091bf4,

	0x0ef40232,

/* 0x0861: i2c_recv_not_wr08 */

/* 0x0861: i2c_recv_done */

	0xf8cec703,

	0x00070d7e,

	0xd0fce0fc,

	0xb20912f4,

	0x023f7e7c,

/* 0x0875: i2c_recv_exit */

/* 0x0877: i2c_init */

	0xf800f800,

/* 0x0879: test_recv */

	0x04584100,

	0xb60011cf,

	0x58400110,
@@ -1128,26 +1424,26 @@ uint32_t nv108_pwr_code[] = { 
	0xe3f1d900,

	0x967e134f,

	0x00f80001,

/* 0x0494: test_init */

/* 0x0898: test_init */

	0x7e08004e,

	0xf8000196,

/* 0x049d: idle_recv */

/* 0x049f: idle */

/* 0x08a1: idle_recv */

/* 0x08a3: idle */

	0xf400f800,

	0x54410031,

	0x0011cf04,

	0x400110b6,

	0x01f60454,

/* 0x04b3: idle_loop */

/* 0x08b7: idle_loop */

	0x0104bd00,

	0x0232f458,

/* 0x04b8: idle_proc */

/* 0x04b8: idle_proc_exec */

/* 0x08bc: idle_proc */

/* 0x08bc: idle_proc_exec */

	0x1eb210f9,

	0x0002487e,

	0x11f410fc,

	0x0231f409,

/* 0x04cb: idle_proc_next */

/* 0x08cf: idle_proc_next */

	0xb6f00ef4,

	0x1fa65810,

	0xf4e81bf4,
@@ -1161,5 +1457,4 @@ uint32_t nv108_pwr_code[] = { 
	0x00000000,

	0x00000000,

	0x00000000,

	0x00000000,

};

drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nva3.fuc

+3 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 
#include "host.fuc"

#include "memx.fuc"

#include "perf.fuc"

#include "i2c_.fuc"

#include "test.fuc"

#include "idle.fuc"

#undef INCLUDE_PROC
@@ -46,6 +47,7 @@ 
#include "host.fuc"

#include "memx.fuc"

#include "perf.fuc"

#include "i2c_.fuc"

#include "test.fuc"

#include "idle.fuc"

#undef INCLUDE_DATA
@@ -57,6 +59,7 @@ 
#include "host.fuc"

#include "memx.fuc"

#include "perf.fuc"

#include "i2c_.fuc"

#include "test.fuc"

#include "idle.fuc"

#undef INCLUDE_CODE

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