Commit 64c0133e authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC fixes from Arnd Bergmann:
 "This week is a much smaller update, containing fixes only for TI OMAP,
  NXP i.MX and Rockchips platforms:

  omap:
   - omap4 had problems with lost timer interrupts
   - another IRQ handling issue with OMAP5
   - A workaround for a regression in the pwm-omap-dmtimer driver

  NXP i.MX:
   - eMMC was broken on the new imx8mq-evk board

  Rockchip:
   - a fix for new dtc graph warnings and a regulator fix for rock64
   - USB support broke on rk3328-rock64"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: OMAP2+: fix lack of timer interrupts on CPU1 after hotplug
  arm64: dts: imx8mq: Fix boot from eMMC
  ARM: OMAP2+: Variable "reg" in function omap4_dsi_mux_pads() could be uninitialized
  ARM: dts: Configure clock parent for pwm vibra
  bus: ti-sysc: Fix timer handling with drop pm_runtime_irq_safe()
  arm64: dts: rockchip: enable usb-host regulators at boot on rk3328-rock64
  arm64: dts: rockchip: fix graph_port warning on rk3399 bob kevin and excavator
  ARM: OMAP5+: Fix inverted nirq pin interrupts with irq_set_type
  clocksource: timer-ti-dm: Fix pwm dmtimer usage of fck reparenting
  ARM: dts: rockchip: remove qos_cif1 from rk3188 power-domain
parents 88fe73cb 410d7360
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+11 −0
Original line number Diff line number Diff line
@@ -644,6 +644,17 @@
	};
};

/* Configure pwm clock source for timers 8 & 9 */
&timer8 {
	assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
	assigned-clock-parents = <&sys_clkin_ck>;
};

&timer9 {
	assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
	assigned-clock-parents = <&sys_clkin_ck>;
};

/*
 * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
 * uart1 wakeirq.
+6 −3
Original line number Diff line number Diff line
@@ -317,7 +317,8 @@

	palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
		pinctrl-single,pins = <
			OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
			/* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
			OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
		>;
	};

@@ -385,7 +386,8 @@

	palmas: palmas@48 {
		compatible = "ti,palmas";
		interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
		/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
		reg = <0x48>;
		interrupt-controller;
		#interrupt-cells = <2>;
@@ -651,7 +653,8 @@
		pinctrl-names = "default";
		pinctrl-0 = <&twl6040_pins>;

		interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
		/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_LOW>;

		/* audpwron gpio defined in the board specific dts */

+11 −1
Original line number Diff line number Diff line
@@ -181,6 +181,13 @@
			OMAP5_IOPAD(0x0042, PIN_INPUT_PULLDOWN | MUX_MODE6)  /* llib_wakereqin.gpio1_wk15 */
		>;
	};

	palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
		pinctrl-single,pins = <
			/* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
			OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
		>;
	};
};

&omap5_pmx_core {
@@ -414,8 +421,11 @@

	palmas: palmas@48 {
		compatible = "ti,palmas";
		interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
		reg = <0x48>;
		pinctrl-0 = <&palmas_sys_nirq_pins>;
		pinctrl-names = "default";
		/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <2>;
		ti,system-power-controller;
+0 −1
Original line number Diff line number Diff line
@@ -719,7 +719,6 @@
			pm_qos = <&qos_lcdc0>,
				 <&qos_lcdc1>,
				 <&qos_cif0>,
				 <&qos_cif1>,
				 <&qos_ipp>,
				 <&qos_rga>;
		};
+4 −12
Original line number Diff line number Diff line
@@ -152,6 +152,10 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
	mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
				 (cx->mpu_logic_state == PWRDM_POWER_OFF);

	/* Enter broadcast mode for periodic timers */
	tick_broadcast_enable();

	/* Enter broadcast mode for one-shot timers */
	tick_broadcast_enter();

	/*
@@ -218,15 +222,6 @@ fail:
	return index;
}

/*
 * For each cpu, setup the broadcast timer because local timers
 * stops for the states above C1.
 */
static void omap_setup_broadcast_timer(void *arg)
{
	tick_broadcast_enable();
}

static struct cpuidle_driver omap4_idle_driver = {
	.name				= "omap4_idle",
	.owner				= THIS_MODULE,
@@ -319,8 +314,5 @@ int __init omap4_idle_init(void)
	if (!cpu_clkdm[0] || !cpu_clkdm[1])
		return -ENODEV;

	/* Configure the broadcast timer on each cpu */
	on_each_cpu(omap_setup_broadcast_timer, NULL, 1);

	return cpuidle_register(idle_driver, cpu_online_mask);
}
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