drm/amd/powerplay: add pstate mclk(uclk) support for navi10 (64974ab2) · Commits · 戴 / test

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -136,6 +136,7 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
		return -EINVAL;

		switch (clk_type) {
		case SMU_MCLK:
		case SMU_UCLK:
		if (!smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) {
		pr_warn("uclk dpm is not enabled\n");

+7 −1

Original line number	Diff line number	Diff line
		@@ -709,7 +709,7 @@ static int navi10_force_clk_levels(struct smu_context *smu,
		static int navi10_populate_umd_state_clk(struct smu_context *smu)
		{
		int ret = 0;
		uint32_t min_sclk_freq = 0;
		uint32_t min_sclk_freq = 0, min_mclk_freq = 0;

		ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq, NULL);
		if (ret)
		@@ -717,6 +717,12 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu)

		smu->pstate_sclk = min_sclk_freq * 100;

		ret = smu_get_dpm_freq_range(smu, SMU_MCLK, &min_mclk_freq, NULL);
		if (ret)
		return ret;

		smu->pstate_mclk = min_mclk_freq * 100;

		return ret;
		}