Commit 6447f55d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx 

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (66 commits)
  avr32: at32ap700x: fix typo in DMA master configuration
  dmaengine/dmatest: Pass timeout via module params
  dma: let IMX_DMA depend on IMX_HAVE_DMA_V1 instead of an explicit list of SoCs
  fsldma: make halt behave nicely on all supported controllers
  fsldma: reduce locking during descriptor cleanup
  fsldma: support async_tx dependencies and automatic unmapping
  fsldma: fix controller lockups
  fsldma: minor codingstyle and consistency fixes
  fsldma: improve link descriptor debugging
  fsldma: use channel name in printk output
  fsldma: move related helper functions near each other
  dmatest: fix automatic buffer unmap type
  drivers, pch_dma: Fix warning when CONFIG_PM=n.
  dmaengine/dw_dmac fix: use readl & writel instead of __raw_readl & __raw_writel
  avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize
  dw_dmac: Setting Default Burst length for transfers as 16.
  dw_dmac: Allow src/dst msize & flow controller to be configured at runtime
  dw_dmac: Changing type of src_master and dest_master to u8.
  dw_dmac: Pass Channel Priority from platform_data
  dw_dmac: Pass Channel Allocation Order from platform_data
  ...
parents c50e3f51 3ea205c4

arch/arm/mach-mxs/include/mach/dma.h

0 → 100644
+26 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#ifndef __MACH_MXS_DMA_H__

#define __MACH_MXS_DMA_H__



struct mxs_dma_data {

	int chan_irq;

};



static inline int mxs_dma_is_apbh(struct dma_chan *chan)

{

	return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbh");

}



static inline int mxs_dma_is_apbx(struct dma_chan *chan)

{

	return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbx");

}



#endif /* __MACH_MXS_DMA_H__ */

arch/arm/plat-nomadik/include/plat/ste_dma40.h

+3 −19
Original line number Diff line number Diff line
@@ -104,6 +104,8 @@ struct stedma40_half_channel_info { 
 *

 * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH

 * @high_priority: true if high-priority

 * @realtime: true if realtime mode is to be enabled.  Only available on DMA40

 * version 3+, i.e DB8500v2+

 * @mode: channel mode: physical, logical, or operation

 * @mode_opt: options for the chosen channel mode

 * @src_dev_type: Src device type
@@ -119,6 +121,7 @@ struct stedma40_half_channel_info { 
struct stedma40_chan_cfg {

	enum stedma40_xfer_dir			 dir;

	bool					 high_priority;

	bool					 realtime;

	enum stedma40_mode			 mode;

	enum stedma40_mode_opt			 mode_opt;

	int					 src_dev_type;
@@ -168,25 +171,6 @@ struct stedma40_platform_data { 


bool stedma40_filter(struct dma_chan *chan, void *data);



/**

 * stedma40_memcpy_sg() - extension of the dma framework, memcpy to/from

 * scattergatter lists.

 *

 * @chan: dmaengine handle

 * @sgl_dst: Destination scatter list

 * @sgl_src: Source scatter list

 * @sgl_len: The length of each scatterlist. Both lists must be of equal length

 * and each element must match the corresponding element in the other scatter

 * list.

 * @flags: is actually enum dma_ctrl_flags. See dmaengine.h

 */



struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,

						   struct scatterlist *sgl_dst,

						   struct scatterlist *sgl_src,

						   unsigned int sgl_len,

						   unsigned long flags);



/**

 * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave

 * (=device)

arch/avr32/mach-at32ap/at32ap700x.c

+15 −0
Original line number Diff line number Diff line
@@ -2048,6 +2048,11 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data, 
		rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;

		rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3);

		rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);

		rx_dws->src_master = 0;

		rx_dws->dst_master = 1;

		rx_dws->src_msize = DW_DMA_MSIZE_1;

		rx_dws->dst_msize = DW_DMA_MSIZE_1;

		rx_dws->fc = DW_DMA_FC_D_P2M;

	}



	/* Check if DMA slave interface for playback should be configured. */
@@ -2056,6 +2061,11 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data, 
		tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;

		tx_dws->cfg_hi = DWC_CFGH_DST_PER(4);

		tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);

		tx_dws->src_master = 0;

		tx_dws->dst_master = 1;

		tx_dws->src_msize = DW_DMA_MSIZE_1;

		tx_dws->dst_msize = DW_DMA_MSIZE_1;

		tx_dws->fc = DW_DMA_FC_D_M2P;

	}



	if (platform_device_add_data(pdev, data,
@@ -2128,6 +2138,11 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data) 
	dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT;

	dws->cfg_hi = DWC_CFGH_DST_PER(2);

	dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);

	dws->src_master = 0;

	dws->dst_master = 1;

	dws->src_msize = DW_DMA_MSIZE_1;

	dws->dst_msize = DW_DMA_MSIZE_1;

	dws->fc = DW_DMA_FC_D_M2P;



	if (platform_device_add_data(pdev, data,

				sizeof(struct atmel_abdac_pdata)))

drivers/dma/Kconfig

+10 −2
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ config INTEL_IOP_ADMA 


config DW_DMAC

	tristate "Synopsys DesignWare AHB DMA support"

	depends on AVR32

	depends on HAVE_CLK

	select DMA_ENGINE

	default y if CPU_AT32AP7000

	help
@@ -221,12 +221,20 @@ config IMX_SDMA 


config IMX_DMA

	tristate "i.MX DMA support"

	depends on ARCH_MX1 || ARCH_MX21 || MACH_MX27

	depends on IMX_HAVE_DMA_V1

	select DMA_ENGINE

	help

	  Support the i.MX DMA engine. This engine is integrated into

	  Freescale i.MX1/21/27 chips.



config MXS_DMA

	bool "MXS DMA support"

	depends on SOC_IMX23 || SOC_IMX28

	select DMA_ENGINE

	help

	  Support the MXS DMA engine. This engine including APBH-DMA

	  and APBX-DMA is integrated into Freescale i.MX23/28 chips.



config DMA_ENGINE

	bool

drivers/dma/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o 
obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/

obj-$(CONFIG_IMX_SDMA) += imx-sdma.o

obj-$(CONFIG_IMX_DMA) += imx-dma.o

obj-$(CONFIG_MXS_DMA) += mxs-dma.o

obj-$(CONFIG_TIMB_DMA) += timb_dma.o

obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o

obj-$(CONFIG_PL330_DMA) += pl330.o

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