powerpc/time: Remove ifdef in get_dec() and set_dec() (63f9d9df) · Commits · 戴 / test

arch/powerpc/include/asm/reg.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -521,6 +521,8 @@
		#define SPRN_TSCR 0x399 /* Thread Switch Control Register */

		#define SPRN_DEC 0x016 /* Decrement Register */
		#define SPRN_PIT 0x3DB /* Programmable Interval Timer (40x/BOOKE) */

		#define SPRN_DER 0x095 /* Debug Enable Register */
		#define DER_RSTE 0x40000000 /* Reset Interrupt */
		#define DER_CHSTPE 0x20000000 /* Check Stop */

+0 −1

Original line number	Diff line number	Diff line
		@@ -174,7 +174,6 @@
		#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
		#define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */
		#define SPRN_MMUCFG 0x3F7 /* MMU Configuration Register */
		#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
		#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */
		#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */
		#define SPRN_L2CSR1 0x3FA /* L2 Data Cache Control and Status Register 1 */

+10 −13

Original line number	Diff line number	Diff line
		@@ -100,11 +100,10 @@ static inline void set_tb(unsigned int upper, unsigned int lower)
		*/
		static inline u64 get_dec(void)
		{
		#if defined(CONFIG_40x)
		return (mfspr(SPRN_PIT));
		#else
		return (mfspr(SPRN_DEC));
		#endif
		if (IS_ENABLED(CONFIG_40x))
		return mfspr(SPRN_PIT);

		return mfspr(SPRN_DEC);
		}

		/*
		@@ -114,14 +113,12 @@ static inline u64 get_dec(void)
		*/
		static inline void set_dec(u64 val)
		{
		#if defined(CONFIG_40x)
		if (IS_ENABLED(CONFIG_40x))
		mtspr(SPRN_PIT, (u32)val);
		#else
		#ifndef CONFIG_BOOKE
		--val;
		#endif
		else if (IS_ENABLED(CONFIG_BOOKE))
		mtspr(SPRN_DEC, val);
		#endif /* not 40x */
		else
		mtspr(SPRN_DEC, val - 1);
		}

		static inline unsigned long tb_ticks_since(unsigned long tstamp)