Commit 63a677bc authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v4.13-rockchip-dts32-1' of... 

Merge tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.

* tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: enable usb for rk3229 evb board
  ARM: dts: rockchip: add usb nodes on rk322x
  ARM: dts: rockchip: add adc button for Firefly
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-veyron
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-firefly
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-rock2-som
  ARM: dts: rockchip: add ARM Mali GPU node for rk3288
  dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU
  ARM: dts: rockchip: set a sane frequence for tsadc on rk322x
  ARM: dts: rockchip: add operating-points-v2 for cpu on rk322x
  ARM: dts: rockchip: set default rates for core clocks on rk322x
  ARM: dts: rockchip: add second uart2 pinctrl on rk322x
  ARM: dts: rockchip: correct rk322x uart2 pinctrl
  ARM: dts: rockchip: add watchdog device node on rk322x
  clk: rockchip: add clock-ids for more rk3228 clocks
  clk: rockchip: add ids for camera on rk3399
  ARM: dts: rockchip: fix rk322x i2s1 pinctrl error
  ARM: dts: rockchip: rename RK1108-evb to RV1108-evb
  ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108
  ARM: dts: rockchip: Setup usb vbus-supply on rk3288-rock2

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 23aaaf8d 81b61d37

Documentation/devicetree/bindings/arm/rockchip.txt

+2 −2
Original line number Diff line number Diff line
@@ -138,9 +138,9 @@ Rockchip platforms device tree bindings 
    Required root node properties:

      - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";



- Rockchip RK1108 Evaluation board

- Rockchip RV1108 Evaluation board

    Required root node properties:

      - compatible = "rockchip,rk1108-evb", "rockchip,rk1108";

      - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";



- Rockchip RK3368 evb:

    Required root node properties:

Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt

0 → 100644
+86 −0
Original line number Diff line number Diff line 
ARM Mali Midgard GPU

====================



Required properties:



- compatible :

  * Must contain one of the following:

    + "arm,mali-t604"

    + "arm,mali-t624"

    + "arm,mali-t628"

    + "arm,mali-t720"

    + "arm,mali-t760"

    + "arm,mali-t820"

    + "arm,mali-t830"

    + "arm,mali-t860"

    + "arm,mali-t880"

  * which must be preceded by one of the following vendor specifics:

    + "amlogic,meson-gxm-mali"

    + "rockchip,rk3288-mali"



- reg : Physical base address of the device and length of the register area.



- interrupts : Contains the three IRQ lines required by Mali Midgard devices.



- interrupt-names : Contains the names of IRQ resources in the order they were

  provided in the interrupts property. Must contain: "job", "mmu", "gpu".





Optional properties:



- clocks : Phandle to clock for the Mali Midgard device.



- mali-supply : Phandle to regulator for the Mali device. Refer to

  Documentation/devicetree/bindings/regulator/regulator.txt for details.



- operating-points-v2 : Refer to Documentation/devicetree/bindings/power/opp.txt

  for details.





Example for a Mali-T760:



gpu@ffa30000 {

	compatible = "rockchip,rk3288-mali", "arm,mali-t760", "arm,mali-midgard";

	reg = <0xffa30000 0x10000>;

	interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

	interrupt-names = "job", "mmu", "gpu";

	clocks = <&cru ACLK_GPU>;

	mali-supply = <&vdd_gpu>;

	operating-points-v2 = <&gpu_opp_table>;

	power-domains = <&power RK3288_PD_GPU>;

};



gpu_opp_table: opp_table0 {

	compatible = "operating-points-v2";



	opp@533000000 {

		opp-hz = /bits/ 64 <533000000>;

		opp-microvolt = <1250000>;

	};

	opp@450000000 {

		opp-hz = /bits/ 64 <450000000>;

		opp-microvolt = <1150000>;

	};

	opp@400000000 {

		opp-hz = /bits/ 64 <400000000>;

		opp-microvolt = <1125000>;

	};

	opp@350000000 {

		opp-hz = /bits/ 64 <350000000>;

		opp-microvolt = <1075000>;

	};

	opp@266000000 {

		opp-hz = /bits/ 64 <266000000>;

		opp-microvolt = <1025000>;

	};

	opp@160000000 {

		opp-hz = /bits/ 64 <160000000>;

		opp-microvolt = <925000>;

	};

	opp@100000000 {

		opp-hz = /bits/ 64 <100000000>;

		opp-microvolt = <912500>;

	};

};

arch/arm/boot/dts/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -719,7 +719,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \ 
	r8a7794-silk.dtb \

	sh73a0-kzm9g.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += \

	rk1108-evb.dtb \

	rv1108-evb.dtb \

	rk3036-evb.dtb \

	rk3036-kylin.dtb \

	rk3066a-bqcurie2.dtb \

arch/arm/boot/dts/rk3229-evb.dts

+74 −0
Original line number Diff line number Diff line
@@ -58,6 +58,17 @@ 
		#clock-cells = <0>;

	};



	vcc_host: vcc-host-regulator {

		compatible = "regulator-fixed";

		enable-active-high;

		gpio = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&host_vbus_drv>;

		regulator-name = "vcc_host";

		regulator-always-on;

		regulator-boot-on;

	};



	vcc_phy: vcc-phy-regulator {

		compatible = "regulator-fixed";

		enable-active-high;
@@ -85,6 +96,69 @@ 
	status = "okay";

};



&pinctrl {

	usb {

		host_vbus_drv: host-vbus-drv {

			rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};

};



&uart2 {

	status = "okay";

};



&u2phy0 {

	status = "okay";



	u2phy0_otg: otg-port {

		status = "okay";

	};



	u2phy0_host: host-port {

		phy-supply = <&vcc_host>;

		status = "okay";

	};

};



&u2phy1 {

	status = "okay";



	u2phy1_otg: otg-port {

		phy-supply = <&vcc_host>;

		status = "okay";

	};



	u2phy1_host: host-port {

		phy-supply = <&vcc_host>;

		status = "okay";

	};

};



&usb_host0_ehci {

	status = "okay";

};



&usb_host0_ohci {

	status = "okay";

};



&usb_host1_ehci {

	status = "okay";

};



&usb_host1_ohci {

	status = "okay";

};



&usb_host2_ehci {

	status = "okay";

};



&usb_host2_ohci {

	status = "okay";

};



&usb_otg {

	status = "okay";

};

arch/arm/boot/dts/rk322x.dtsi

+200 −11
Original line number Diff line number Diff line
@@ -66,10 +66,7 @@ 
			compatible = "arm,cortex-a7";

			reg = <0xf00>;

			resets = <&cru SRST_CORE0>;

			operating-points = <

				/* KHz    uV */

				 816000 1000000

			>;

			operating-points-v2 = <&cpu0_opp_table>;

			#cooling-cells = <2>; /* min followed by max */

			clock-latency = <40000>;

			clocks = <&cru ARMCLK>;
@@ -80,6 +77,7 @@ 
			compatible = "arm,cortex-a7";

			reg = <0xf01>;

			resets = <&cru SRST_CORE1>;

			operating-points-v2 = <&cpu0_opp_table>;

		};



		cpu2: cpu@f02 {
@@ -87,6 +85,7 @@ 
			compatible = "arm,cortex-a7";

			reg = <0xf02>;

			resets = <&cru SRST_CORE2>;

			operating-points-v2 = <&cpu0_opp_table>;

		};



		cpu3: cpu@f03 {
@@ -94,6 +93,35 @@ 
			compatible = "arm,cortex-a7";

			reg = <0xf03>;

			resets = <&cru SRST_CORE3>;

			operating-points-v2 = <&cpu0_opp_table>;

		};

	};



	cpu0_opp_table: opp_table0 {

		compatible = "operating-points-v2";

		opp-shared;



		opp-408000000 {

			opp-hz = /bits/ 64 <408000000>;

			opp-microvolt = <950000>;

			clock-latency-ns = <40000>;

			opp-suspend;

		};

		opp-600000000 {

			opp-hz = /bits/ 64 <600000000>;

			opp-microvolt = <975000>;

		};

		opp-816000000 {

			opp-hz = /bits/ 64 <816000000>;

			opp-microvolt = <1000000>;

		};

		opp-1008000000 {

			opp-hz = /bits/ 64 <1008000000>;

			opp-microvolt = <1175000>;

		};

		opp-1200000000 {

			opp-hz = /bits/ 64 <1200000000>;

			opp-microvolt = <1275000>;

		};

	};
@@ -182,8 +210,61 @@ 
	};



	grf: syscon@11000000 {

		compatible = "syscon";

		compatible = "syscon", "simple-mfd";

		reg = <0x11000000 0x1000>;

		#address-cells = <1>;

		#size-cells = <1>;



		u2phy0: usb2-phy@760 {

			compatible = "rockchip,rk3228-usb2phy";

			reg = <0x0760 0x0c>;

			clocks = <&cru SCLK_OTGPHY0>;

			clock-names = "phyclk";

			clock-output-names = "usb480m_phy0";

			#clock-cells = <0>;

			status = "disabled";



			u2phy0_otg: otg-port {

				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "otg-bvalid", "otg-id",

						  "linestate";

				#phy-cells = <0>;

				status = "disabled";

			};



			u2phy0_host: host-port {

				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "linestate";

				#phy-cells = <0>;

				status = "disabled";

			};

		};



		u2phy1: usb2-phy@800 {

			compatible = "rockchip,rk3228-usb2phy";

			reg = <0x0800 0x0c>;

			clocks = <&cru SCLK_OTGPHY1>;

			clock-names = "phyclk";

			clock-output-names = "usb480m_phy1";

			#clock-cells = <0>;

			status = "disabled";



			u2phy1_otg: otg-port {

				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "linestate";

				#phy-cells = <0>;

				status = "disabled";

			};



			u2phy1_host: host-port {

				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "linestate";

				#phy-cells = <0>;

				status = "disabled";

			};

		};

	};



	uart0: serial@11010000 {
@@ -280,6 +361,14 @@ 
		status = "disabled";

	};



	wdt: watchdog@110a0000 {

		compatible = "snps,dw-wdt";

		reg = <0x110a0000 0x100>;

		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru PCLK_CPU>;

		status = "disabled";

	};



	pwm0: pwm@110b0000 {

		compatible = "rockchip,rk3288-pwm";

		reg = <0x110b0000 0x10>;
@@ -338,8 +427,18 @@ 
		rockchip,grf = <&grf>;

		#clock-cells = <1>;

		#reset-cells = <1>;

		assigned-clocks = <&cru PLL_GPLL>;

		assigned-clock-rates = <594000000>;

		assigned-clocks =

			<&cru PLL_GPLL>, <&cru ARMCLK>,

			<&cru PLL_CPLL>, <&cru ACLK_PERI>,

			<&cru HCLK_PERI>, <&cru PCLK_PERI>,

			<&cru ACLK_CPU>, <&cru HCLK_CPU>,

			<&cru PCLK_CPU>;

		assigned-clock-rates =

			<594000000>, <816000000>,

			<500000000>, <150000000>,

			<150000000>, <75000000>,

			<150000000>, <150000000>,

			<75000000>;

	};



	thermal-zones {
@@ -388,6 +487,8 @@ 
		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;

		clock-names = "tsadc", "apb_pclk";

		assigned-clocks = <&cru SCLK_TSADC>;

		assigned-clock-rates = <32768>;

		resets = <&cru SRST_TSADC>;

		reset-names = "tsadc-apb";

		pinctrl-names = "init", "default", "sleep";
@@ -419,6 +520,89 @@ 
		status = "disabled";

	};



	usb_otg: usb@30040000 {

		compatible = "rockchip,rk3228-usb", "rockchip,rk3066-usb",

			     "snps,dwc2";

		reg = <0x30040000 0x40000>;

		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_OTG>;

		clock-names = "otg";

		dr_mode = "otg";

		g-np-tx-fifo-size = <16>;

		g-rx-fifo-size = <280>;

		g-tx-fifo-size = <256 128 128 64 32 16>;

		g-use-dma;

		phys = <&u2phy0_otg>;

		phy-names = "usb2-phy";

		status = "disabled";

	};



	usb_host0_ehci: usb@30080000 {

		compatible = "generic-ehci";

		reg = <0x30080000 0x20000>;

		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_HOST0>, <&u2phy0>;

		clock-names = "usbhost", "utmi";

		phys = <&u2phy0_host>;

		phy-names = "usb";

		status = "disabled";

	};



	usb_host0_ohci: usb@300a0000 {

		compatible = "generic-ohci";

		reg = <0x300a0000 0x20000>;

		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_HOST0>, <&u2phy0>;

		clock-names = "usbhost", "utmi";

		phys = <&u2phy0_host>;

		phy-names = "usb";

		status = "disabled";

	};



	usb_host1_ehci: usb@300c0000 {

		compatible = "generic-ehci";

		reg = <0x300c0000 0x20000>;

		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_HOST1>, <&u2phy1>;

		clock-names = "usbhost", "utmi";

		phys = <&u2phy1_otg>;

		phy-names = "usb";

		status = "disabled";

	};



	usb_host1_ohci: usb@300e0000 {

		compatible = "generic-ohci";

		reg = <0x300e0000 0x20000>;

		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_HOST1>, <&u2phy1>;

		clock-names = "usbhost", "utmi";

		phys = <&u2phy1_otg>;

		phy-names = "usb";

		status = "disabled";

	};



	usb_host2_ehci: usb@30100000 {

		compatible = "generic-ehci";

		reg = <0x30100000 0x20000>;

		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_HOST2>, <&u2phy1>;

		phys = <&u2phy1_host>;

		phy-names = "usb";

		clock-names = "usbhost", "utmi";

		status = "disabled";

	};



	usb_host2_ohci: usb@30120000 {

		compatible = "generic-ohci";

		reg = <0x30120000 0x20000>;

		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_HOST2>, <&u2phy1>;

		clock-names = "usbhost", "utmi";

		phys = <&u2phy1_host>;

		phy-names = "usb";

		status = "disabled";

	};



	gmac: ethernet@30200000 {

		compatible = "rockchip,rk3228-gmac";

		reg = <0x30200000 0x10000>;
@@ -621,9 +805,9 @@ 
						<0 12 RK_FUNC_1 &pcfg_pull_none>,

						<0 13 RK_FUNC_1 &pcfg_pull_none>,

						<0 14 RK_FUNC_1 &pcfg_pull_none>,

						<1 2 RK_FUNC_1 &pcfg_pull_none>,

						<1 4 RK_FUNC_1 &pcfg_pull_none>,

						<1 5 RK_FUNC_1 &pcfg_pull_none>;

						<1 2 RK_FUNC_2 &pcfg_pull_none>,

						<1 4 RK_FUNC_2 &pcfg_pull_none>,

						<1 5 RK_FUNC_2 &pcfg_pull_none>;

			};

		};
@@ -693,10 +877,15 @@ 


		uart2 {

			uart2_xfer: uart2-xfer {

				rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,

				rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>,

						<1 19 RK_FUNC_2 &pcfg_pull_none>;

			};



			uart21_xfer: uart21-xfer {

				rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>,

						<1 9 RK_FUNC_2 &pcfg_pull_none>;

			};



			uart2_cts: uart2-cts {

				rockchip,pins = <0 25 RK_FUNC_1 &pcfg_pull_none>;

			};

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