Commit 638b642f authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab Committed by Jonathan Corbet
Browse files

docs: riscv: convert boot-image-header.txt to ReST 



Convert this small file to ReST format by:
   - Using a proper markup for the document title;
   - marking a code block as such;
   - use tags for Author and date;
   - use tables for bit map fields.

While here, fix a broken reference for a document with is
planned but is not here yet.

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
Reviewed-by: default avatarAtish Patra <atish.patra@wdc.com>
Signed-off-by: default avatarJonathan Corbet <corbet@lwn.net>
parent 54bfe6fe

Documentation/riscv/boot-image-header.txt→Documentation/riscv/boot-image-header.rst

+25 −14
Original line number Diff line number Diff line 
=================================

Boot image header in RISC-V Linux

			=============================================

=================================



Author: Atish Patra <atish.patra@wdc.com>

Date  : 20 May 2019

:Author: Atish Patra <atish.patra@wdc.com>

:Date:   20 May 2019



This document only describes the boot image header details for RISC-V Linux.

The complete booting guide will be available at Documentation/riscv/booting.txt.



The following 64-byte header is present in decompressed Linux kernel image.

TODO:

  Write a complete booting guide.



The following 64-byte header is present in decompressed Linux kernel image::



	u32 code0;		  /* Executable code */

	u32 code1;		  /* Executable code */
@@ -25,16 +28,21 @@ This header format is compliant with PE/COFF header and largely inspired from 
ARM64 header. Thus, both ARM64 & RISC-V header can be combined into one common

header in future.



Notes:

Notes

=====



- This header can also be reused to support EFI stub for RISC-V in future. EFI

  specification needs PE/COFF image header in the beginning of the kernel image

  in order to load it as an EFI application. In order to support EFI stub,

  code0 should be replaced with "MZ" magic string and res5(at offset 0x3c) should

  point to the rest of the PE/COFF header.



- version field indicate header version number.

	Bits 0:15  - Minor version

	Bits 16:31 - Major version

- version field indicate header version number



	==========  =============

	Bits 0:15   Minor version

	Bits 16:31  Major version

	==========  =============



  This preserves compatibility across newer and older version of the header.

  The current version is defined as 0.1.
@@ -44,7 +52,10 @@ Notes: 
  extension for RISC-V in future. For current version, it is set to be zero.



- In current header, the flag field has only one field.

	Bit 0: Kernel endianness. 1 if BE, 0 if LE.



	=====  ====================================

	Bit 0  Kernel endianness. 1 if BE, 0 if LE.

	=====  ====================================



- Image size is mandatory for boot loader to load kernel image. Booting will

  fail otherwise.

Documentation/riscv/index.rst

+1 −0
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@@ -5,6 +5,7 @@ RISC-V architecture 
.. toctree::

    :maxdepth: 1



    boot-image-header

    pmu



.. only::  subproject and html

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