Commit 634e11d5 authored by Amit Kucheria's avatar Amit Kucheria Committed by Daniel Lezcano
Browse files

drivers: thermal: tsens: Add interrupt support 



Depending on the IP version, TSENS supports upper, lower and critical
threshold interrupts. We only add support for upper and lower threshold
interrupts for now.

TSENSv2 has an irq [status|clear|mask] bit tuple for each sensor while
earlier versions only have a single bit per sensor to denote status and
clear. These differences are handled transparently by the interrupt
handler. At each interrupt, we reprogram the new upper and lower threshold
in the .set_trip callback.

Signed-off-by: default avatarAmit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/7508ba143f144407e5dd546107ddae65c380a76f.1572526427.git.amit.kucheria@linaro.org
parent bd93ee3c

drivers/thermal/qcom/tsens-common.c

+361 −16
Original line number Diff line number Diff line
@@ -13,6 +13,31 @@ 
#include <linux/regmap.h>

#include "tsens.h"



/**

 * struct tsens_irq_data - IRQ status and temperature violations

 * @up_viol:        upper threshold violated

 * @up_thresh:      upper threshold temperature value

 * @up_irq_mask:    mask register for upper threshold irqs

 * @up_irq_clear:   clear register for uppper threshold irqs

 * @low_viol:       lower threshold violated

 * @low_thresh:     lower threshold temperature value

 * @low_irq_mask:   mask register for lower threshold irqs

 * @low_irq_clear:  clear register for lower threshold irqs

 *

 * Structure containing data about temperature threshold settings and

 * irq status if they were violated.

 */

struct tsens_irq_data {

	u32 up_viol;

	int up_thresh;

	u32 up_irq_mask;

	u32 up_irq_clear;

	u32 low_viol;

	int low_thresh;

	u32 low_irq_mask;

	u32 low_irq_clear;

};



char *qfprom_read(struct device *dev, const char *cname)

{

	struct nvmem_cell *cell;
@@ -65,6 +90,14 @@ void compute_intercept_slope(struct tsens_priv *priv, u32 *p1, 
	}

}



static inline u32 degc_to_code(int degc, const struct tsens_sensor *s)

{

	u64 code = (degc * s->slope + s->offset) / SLOPE_FACTOR;



	pr_debug("%s: raw_code: 0x%llx, degc:%d\n", __func__, code, degc);

	return clamp_val(code, THRESHOLD_MIN_ADC_CODE, THRESHOLD_MAX_ADC_CODE);

}



static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s)

{

	int degc, num, den;
@@ -117,6 +150,313 @@ static int tsens_hw_to_mC(struct tsens_sensor *s, int field) 
	return sign_extend32(temp, resolution) * 100;

}



/**

 * tsens_mC_to_hw - Convert temperature to hardware register value

 * @s: Pointer to sensor struct

 * @temp: temperature in milliCelsius to be programmed to hardware

 *

 * This function outputs the value to be written to hardware in ADC code

 * or deciCelsius depending on IP version.

 *

 * Return: ADC code or temperature in deciCelsius.

 */

static int tsens_mC_to_hw(struct tsens_sensor *s, int temp)

{

	struct tsens_priv *priv = s->priv;



	/* milliC to adc code */

	if (priv->feat->adc)

		return degc_to_code(temp / 1000, s);



	/* milliC to deciC */

	return temp / 100;

}



static inline enum tsens_ver tsens_version(struct tsens_priv *priv)

{

	return priv->feat->ver_major;

}



static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id,

				   enum tsens_irq_type irq_type, bool enable)

{

	u32 index = 0;



	switch (irq_type) {

	case UPPER:

		index = UP_INT_CLEAR_0 + hw_id;

		break;

	case LOWER:

		index = LOW_INT_CLEAR_0 + hw_id;

		break;

	}

	regmap_field_write(priv->rf[index], enable ? 0 : 1);

}



static void tsens_set_interrupt_v2(struct tsens_priv *priv, u32 hw_id,

				   enum tsens_irq_type irq_type, bool enable)

{

	u32 index_mask = 0, index_clear = 0;



	/*

	 * To enable the interrupt flag for a sensor:

	 *    - clear the mask bit

	 * To disable the interrupt flag for a sensor:

	 *    - Mask further interrupts for this sensor

	 *    - Write 1 followed by 0 to clear the interrupt

	 */

	switch (irq_type) {

	case UPPER:

		index_mask  = UP_INT_MASK_0 + hw_id;

		index_clear = UP_INT_CLEAR_0 + hw_id;

		break;

	case LOWER:

		index_mask  = LOW_INT_MASK_0 + hw_id;

		index_clear = LOW_INT_CLEAR_0 + hw_id;

		break;

	}



	if (enable) {

		regmap_field_write(priv->rf[index_mask], 0);

	} else {

		regmap_field_write(priv->rf[index_mask],  1);

		regmap_field_write(priv->rf[index_clear], 1);

		regmap_field_write(priv->rf[index_clear], 0);

	}

}



/**

 * tsens_set_interrupt - Set state of an interrupt

 * @priv: Pointer to tsens controller private data

 * @hw_id: Hardware ID aka. sensor number

 * @irq_type: irq_type from enum tsens_irq_type

 * @enable: false = disable, true = enable

 *

 * Call IP-specific function to set state of an interrupt

 *

 * Return: void

 */

static void tsens_set_interrupt(struct tsens_priv *priv, u32 hw_id,

				enum tsens_irq_type irq_type, bool enable)

{

	dev_dbg(priv->dev, "[%u] %s: %s -> %s\n", hw_id, __func__,

		irq_type ? ((irq_type == 1) ? "UP" : "CRITICAL") : "LOW",

		enable ? "en" : "dis");

	if (tsens_version(priv) > VER_1_X)

		tsens_set_interrupt_v2(priv, hw_id, irq_type, enable);

	else

		tsens_set_interrupt_v1(priv, hw_id, irq_type, enable);

}



/**

 * tsens_threshold_violated - Check if a sensor temperature violated a preset threshold

 * @priv: Pointer to tsens controller private data

 * @hw_id: Hardware ID aka. sensor number

 * @d: Pointer to irq state data

 *

 * Return: 0 if threshold was not violated, 1 if it was violated and negative

 * errno in case of errors

 */

static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id,

				    struct tsens_irq_data *d)

{

	int ret;



	ret = regmap_field_read(priv->rf[UPPER_STATUS_0 + hw_id], &d->up_viol);

	if (ret)

		return ret;

	ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol);

	if (ret)

		return ret;

	if (d->up_viol || d->low_viol)

		return 1;



	return 0;

}



static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id,

				struct tsens_sensor *s, struct tsens_irq_data *d)

{

	int ret;



	ret = regmap_field_read(priv->rf[UP_INT_CLEAR_0 + hw_id], &d->up_irq_clear);

	if (ret)

		return ret;

	ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear);

	if (ret)

		return ret;

	if (tsens_version(priv) > VER_1_X) {

		ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask);

		if (ret)

			return ret;

		ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask);

		if (ret)

			return ret;

	} else {

		/* No mask register on older TSENS */

		d->up_irq_mask = 0;

		d->low_irq_mask = 0;

	}



	d->up_thresh  = tsens_hw_to_mC(s, UP_THRESH_0 + hw_id);

	d->low_thresh = tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id);



	dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u) | clr(%u|%u) | mask(%u|%u)\n",

		hw_id, __func__, (d->up_viol || d->low_viol) ? "(V)" : "",

		d->low_viol, d->up_viol, d->low_irq_clear, d->up_irq_clear,

		d->low_irq_mask, d->up_irq_mask);

	dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d)\n", hw_id, __func__,

		(d->up_viol || d->low_viol) ? "(violation)" : "",

		d->low_thresh, d->up_thresh);



	return 0;

}



static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)

{

	if (ver > VER_1_X)

		return mask & (1 << hw_id);



	/* v1, v0.1 don't have a irq mask register */

	return 0;

}



/**

 * tsens_irq_thread - Threaded interrupt handler for uplow interrupts

 * @irq: irq number

 * @data: tsens controller private data

 *

 * Check all sensors to find ones that violated their threshold limits. If the

 * temperature is still outside the limits, call thermal_zone_device_update() to

 * update the thresholds, else re-enable the interrupts.

 *

 * The level-triggered interrupt might deassert if the temperature returned to

 * within the threshold limits by the time the handler got scheduled. We

 * consider the irq to have been handled in that case.

 *

 * Return: IRQ_HANDLED

 */

irqreturn_t tsens_irq_thread(int irq, void *data)

{

	struct tsens_priv *priv = data;

	struct tsens_irq_data d;

	bool enable = true, disable = false;

	unsigned long flags;

	int temp, ret, i;



	for (i = 0; i < priv->num_sensors; i++) {

		bool trigger = false;

		struct tsens_sensor *s = &priv->sensor[i];

		u32 hw_id = s->hw_id;



		if (IS_ERR(priv->sensor[i].tzd))

			continue;

		if (!tsens_threshold_violated(priv, hw_id, &d))

			continue;

		ret = get_temp_tsens_valid(s, &temp);

		if (ret) {

			dev_err(priv->dev, "[%u] %s: error reading sensor\n", hw_id, __func__);

			continue;

		}



		spin_lock_irqsave(&priv->ul_lock, flags);



		tsens_read_irq_state(priv, hw_id, s, &d);



		if (d.up_viol &&

		    !masked_irq(hw_id, d.up_irq_mask, tsens_version(priv))) {

			tsens_set_interrupt(priv, hw_id, UPPER, disable);

			if (d.up_thresh > temp) {

				dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",

					priv->sensor[i].hw_id, __func__);

				tsens_set_interrupt(priv, hw_id, UPPER, enable);

			} else {

				trigger = true;

				/* Keep irq masked */

			}

		} else if (d.low_viol &&

			   !masked_irq(hw_id, d.low_irq_mask, tsens_version(priv))) {

			tsens_set_interrupt(priv, hw_id, LOWER, disable);

			if (d.low_thresh < temp) {

				dev_dbg(priv->dev, "[%u] %s: re-arm low\n",

					priv->sensor[i].hw_id, __func__);

				tsens_set_interrupt(priv, hw_id, LOWER, enable);

			} else {

				trigger = true;

				/* Keep irq masked */

			}

		}



		spin_unlock_irqrestore(&priv->ul_lock, flags);



		if (trigger) {

			dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",

				hw_id, __func__, temp);

			thermal_zone_device_update(priv->sensor[i].tzd,

						   THERMAL_EVENT_UNSPECIFIED);

		} else {

			dev_dbg(priv->dev, "[%u] %s: no violation:  %d\n",

				hw_id, __func__, temp);

		}

	}



	return IRQ_HANDLED;

}



int tsens_set_trips(void *_sensor, int low, int high)

{

	struct tsens_sensor *s = _sensor;

	struct tsens_priv *priv = s->priv;

	struct device *dev = priv->dev;

	struct tsens_irq_data d;

	unsigned long flags;

	int high_val, low_val, cl_high, cl_low;

	u32 hw_id = s->hw_id;



	dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",

		hw_id, __func__, low, high);



	cl_high = clamp_val(high, -40000, 120000);

	cl_low  = clamp_val(low, -40000, 120000);



	high_val = tsens_mC_to_hw(s, cl_high);

	low_val  = tsens_mC_to_hw(s, cl_low);



	spin_lock_irqsave(&priv->ul_lock, flags);



	tsens_read_irq_state(priv, hw_id, s, &d);



	/* Write the new thresholds and clear the status */

	regmap_field_write(priv->rf[LOW_THRESH_0 + hw_id], low_val);

	regmap_field_write(priv->rf[UP_THRESH_0 + hw_id], high_val);

	tsens_set_interrupt(priv, hw_id, LOWER, true);

	tsens_set_interrupt(priv, hw_id, UPPER, true);



	spin_unlock_irqrestore(&priv->ul_lock, flags);



	dev_dbg(dev, "[%u] %s: (%d:%d)->(%d:%d)\n",

		s->hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);



	return 0;

}



int tsens_enable_irq(struct tsens_priv *priv)

{

	int ret;

	int val = tsens_version(priv) > VER_1_X ? 7 : 1;



	ret = regmap_field_write(priv->rf[INT_EN], val);

	if (ret < 0)

		dev_err(priv->dev, "%s: failed to enable interrupts\n", __func__);



	return ret;

}



void tsens_disable_irq(struct tsens_priv *priv)

{

	regmap_field_write(priv->rf[INT_EN], 0);

}



int get_temp_tsens_valid(struct tsens_sensor *s, int *temp)

{

	struct tsens_priv *priv = s->priv;
@@ -187,7 +527,7 @@ static int dbg_version_show(struct seq_file *s, void *data) 
	u32 maj_ver, min_ver, step_ver;

	int ret;



	if (tsens_ver(priv) > VER_0_1) {

	if (tsens_version(priv) > VER_0_1) {

		ret = regmap_field_read(priv->rf[VER_MAJOR], &maj_ver);

		if (ret)

			return ret;
@@ -292,7 +632,7 @@ int __init init_common(struct tsens_priv *priv) 
		goto err_put_device;

	}



	if (tsens_ver(priv) > VER_0_1) {

	if (tsens_version(priv) > VER_0_1) {

		for (i = VER_MAJOR; i <= VER_STEP; i++) {

			priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,

							      priv->fields[i]);
@@ -322,24 +662,29 @@ int __init init_common(struct tsens_priv *priv) 
		ret = PTR_ERR(priv->rf[SENSOR_EN]);

		goto err_put_device;

	}

	/* now alloc regmap_fields in tm_map */

	for (i = 0, j = LAST_TEMP_0; i < priv->feat->max_sensors; i++, j++) {

		priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map,

						      priv->fields[j]);

		if (IS_ERR(priv->rf[j])) {

			ret = PTR_ERR(priv->rf[j]);

	priv->rf[INT_EN] = devm_regmap_field_alloc(dev, priv->tm_map,

						   priv->fields[INT_EN]);

	if (IS_ERR(priv->rf[INT_EN])) {

		ret = PTR_ERR(priv->rf[INT_EN]);

		goto err_put_device;

	}

	}

	for (i = 0, j = VALID_0; i < priv->feat->max_sensors; i++, j++) {

		priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map,

						      priv->fields[j]);

		if (IS_ERR(priv->rf[j])) {

			ret = PTR_ERR(priv->rf[j]);



	/* This loop might need changes if enum regfield_ids is reordered */

	for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {

		for (i = 0; i < priv->feat->max_sensors; i++) {

			int idx = j + i;



			priv->rf[idx] = devm_regmap_field_alloc(dev, priv->tm_map,

								priv->fields[idx]);

			if (IS_ERR(priv->rf[idx])) {

				ret = PTR_ERR(priv->rf[idx]);

				goto err_put_device;

			}

		}

	}



	spin_lock_init(&priv->ul_lock);

	tsens_enable_irq(priv);

	tsens_debug_init(op);



	return 0;

drivers/thermal/qcom/tsens-v0_1.c

+11 −0
Original line number Diff line number Diff line
@@ -347,9 +347,20 @@ static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = { 
	/* INTERRUPT ENABLE */

	[INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),



	/* UPPER/LOWER TEMPERATURE THRESHOLDS */

	REG_FIELD_FOR_EACH_SENSOR11(LOW_THRESH,    TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF,  0,  9),

	REG_FIELD_FOR_EACH_SENSOR11(UP_THRESH,     TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19),



	/* UPPER/LOWER INTERRUPTS [CLEAR/STATUS] */

	REG_FIELD_FOR_EACH_SENSOR11(LOW_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 20, 20),

	REG_FIELD_FOR_EACH_SENSOR11(UP_INT_CLEAR,  TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 21, 21),



	/* NO CRITICAL INTERRUPT SUPPORT on v0.1 */



	/* Sn_STATUS */

	REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP,    TM_Sn_STATUS_OFF,  0,  9),

	/* No VALID field on v0.1 */

	/* xxx_STATUS bits: 1 == threshold violated */

	REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS,   TM_Sn_STATUS_OFF, 10, 10),

	REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11),

	REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12),

drivers/thermal/qcom/tsens-v1.c

+29 −0
Original line number Diff line number Diff line
@@ -17,6 +17,8 @@ 
#define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF	0x0004

#define TM_Sn_STATUS_OFF			0x0044

#define TM_TRDY_OFF				0x0084

#define TM_HIGH_LOW_INT_STATUS_OFF		0x0088

#define TM_HIGH_LOW_Sn_INT_THRESHOLD_OFF	0x0090



/* eeprom layout data for qcs404/405 (v1) */

#define BASE0_MASK	0x000007f8
@@ -168,9 +170,36 @@ static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = { 
	/* INTERRUPT ENABLE */

	[INT_EN]     = REG_FIELD(TM_INT_EN_OFF, 0, 0),



	/* UPPER/LOWER TEMPERATURE THRESHOLDS */

	REG_FIELD_FOR_EACH_SENSOR11(LOW_THRESH,    TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF,  0,  9),

	REG_FIELD_FOR_EACH_SENSOR11(UP_THRESH,     TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19),



	/* UPPER/LOWER INTERRUPTS [CLEAR/STATUS] */

	REG_FIELD_FOR_EACH_SENSOR11(LOW_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 20, 20),

	REG_FIELD_FOR_EACH_SENSOR11(UP_INT_CLEAR,  TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 21, 21),

	[LOW_INT_STATUS_0] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  0,  0),

	[LOW_INT_STATUS_1] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  1,  1),

	[LOW_INT_STATUS_2] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  2,  2),

	[LOW_INT_STATUS_3] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  3,  3),

	[LOW_INT_STATUS_4] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  4,  4),

	[LOW_INT_STATUS_5] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  5,  5),

	[LOW_INT_STATUS_6] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  6,  6),

	[LOW_INT_STATUS_7] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  7,  7),

	[UP_INT_STATUS_0]  = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  8,  8),

	[UP_INT_STATUS_1]  = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF,  9,  9),

	[UP_INT_STATUS_2]  = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 10, 10),

	[UP_INT_STATUS_3]  = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 11, 11),

	[UP_INT_STATUS_4]  = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 12, 12),

	[UP_INT_STATUS_5]  = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 13, 13),

	[UP_INT_STATUS_6]  = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 14, 14),

	[UP_INT_STATUS_7]  = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 15, 15),



	/* NO CRITICAL INTERRUPT SUPPORT on v1 */



	/* Sn_STATUS */

	REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP,    TM_Sn_STATUS_OFF,  0,  9),

	REG_FIELD_FOR_EACH_SENSOR11(VALID,        TM_Sn_STATUS_OFF, 14, 14),

	/* xxx_STATUS bits: 1 == threshold violated */

	REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS,   TM_Sn_STATUS_OFF, 10, 10),

	REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11),

	REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12),

drivers/thermal/qcom/tsens-v2.c

+13 −0
Original line number Diff line number Diff line
@@ -50,9 +50,22 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { 
	/* v2 has separate enables for UPPER/LOWER/CRITICAL interrupts */

	[INT_EN]  = REG_FIELD(TM_INT_EN_OFF, 0, 2),



	/* TEMPERATURE THRESHOLDS */

	REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF,  0,  11),

	REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH,  TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12,  23),



	/* INTERRUPTS [CLEAR/STATUS/MASK] */

	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),

	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),

	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),

	REG_FIELD_SPLIT_BITS_16_31(UP_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),

	REG_FIELD_SPLIT_BITS_16_31(UP_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),

	REG_FIELD_SPLIT_BITS_16_31(UP_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),



	/* Sn_STATUS */

	REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP,       TM_Sn_STATUS_OFF,  0,  11),

	REG_FIELD_FOR_EACH_SENSOR16(VALID,           TM_Sn_STATUS_OFF, 21,  21),

	/* xxx_STATUS bits: 1 == threshold violated */

	REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS,      TM_Sn_STATUS_OFF, 16,  16),

	REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS,    TM_Sn_STATUS_OFF, 17,  17),

	REG_FIELD_FOR_EACH_SENSOR16(UPPER_STATUS,    TM_Sn_STATUS_OFF, 18,  18),

drivers/thermal/qcom/tsens.c

+30 −2
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <linux/err.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/of_platform.h>

#include <linux/platform_device.h>

#include <linux/pm.h>

#include <linux/slab.h>
@@ -78,12 +79,14 @@ MODULE_DEVICE_TABLE(of, tsens_table); 
static const struct thermal_zone_of_device_ops tsens_of_ops = {

	.get_temp = tsens_get_temp,

	.get_trend = tsens_get_trend,

	.set_trips = tsens_set_trips,

};



static int tsens_register(struct tsens_priv *priv)

{

	int i;

	int i, ret, irq;

	struct thermal_zone_device *tzd;

	struct platform_device *pdev;



	for (i = 0;  i < priv->num_sensors; i++) {

		priv->sensor[i].priv = priv;
@@ -96,7 +99,31 @@ static int tsens_register(struct tsens_priv *priv) 
		if (priv->ops->enable)

			priv->ops->enable(priv, i);

	}

	return 0;



	pdev = of_find_device_by_node(priv->dev->of_node);

	if (!pdev)

		return -ENODEV;



	irq = platform_get_irq_byname(pdev, "uplow");

	if (irq < 0) {

		ret = irq;

		goto err_put_device;

	}



	ret = devm_request_threaded_irq(&pdev->dev, irq,

					NULL, tsens_irq_thread,

					IRQF_TRIGGER_HIGH | IRQF_ONESHOT,

					dev_name(&pdev->dev), priv);

	if (ret) {

		dev_err(&pdev->dev, "%s: failed to get irq\n", __func__);

		goto err_put_device;

	}



	enable_irq_wake(irq);



err_put_device:

	put_device(&pdev->dev);

	return ret;

}



static int tsens_probe(struct platform_device *pdev)
@@ -178,6 +205,7 @@ static int tsens_remove(struct platform_device *pdev) 
	struct tsens_priv *priv = platform_get_drvdata(pdev);



	debugfs_remove_recursive(priv->debug_root);

	tsens_disable_irq(priv);

	if (priv->ops->disable)

		priv->ops->disable(priv);

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