Commit 62c91ead authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2020-06-19' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "Just i915 and amd here.

  i915 has some workaround movement so they get applied at the right
  times, and a timeslicing fix, along with some display fixes.

  AMD has a few display floating point fix and a devcgroup fix for
  amdkfd.

  i915:
   - Fix for timeslicing and virtual engines/unpremptable requests (+ 1
     dependency patch)
   - Fixes into TypeC register programming and interrupt storm detecting
   - Disable DIP on MST ports with the transcoder clock still on
   - Avoid missing GT workarounds at reset for HSW and older gens
   - Fix for unwinding multiple requests missing force restore
   - Fix encoder type check for DDI vswing sequence
   - Build warning fixes

  amdgpu:
   - Fix kvfree/kfree mixup
   - Fix hawaii device id in powertune configuration
   - Display FP fixes
   - Documentation fixes

  amdkfd:
   - devcgroup check fix"

* tag 'drm-fixes-2020-06-19' of git://anongit.freedesktop.org/drm/drm: (23 commits)
  drm/amdgpu: fix documentation around busy_percentage
  drm/amdgpu/pm: update comment to clarify Overdrive interfaces
  drm/amdkfd: Use correct major in devcgroup check
  drm/i915/display: Fix the encoder type check
  drm/i915/icl+: Fix hotplug interrupt disabling after storm detection
  drm/i915/gt: Move gen4 GT workarounds from init_clock_gating to workarounds
  drm/i915/gt: Move ilk GT workarounds from init_clock_gating to workarounds
  drm/i915/gt: Move snb GT workarounds from init_clock_gating to workarounds
  drm/i915/gt: Move vlv GT workarounds from init_clock_gating to workarounds
  drm/i915/gt: Move ivb GT workarounds from init_clock_gating to workarounds
  drm/i915/gt: Move hsw GT workarounds from init_clock_gating to workarounds
  drm/i915/icl: Disable DIP on MST ports with the transcoder clock still on
  drm/i915/gt: Incrementally check for rewinding
  drm/i915/tc: fix the reset of ln0
  drm/i915/gt: Prevent timeslicing into unpreemptable requests
  drm/i915/selftests: Restore to default heartbeat
  drm/i915: work around false-positive maybe-uninitialized warning
  drm/i915/pmu: avoid an maybe-uninitialized warning
  drm/i915/gt: Incorporate the virtual engine into timeslicing
  drm/amd/display: Rework dsc to isolate FPU operations
  ...
parents 672f9255 8a7a3d1d

Documentation/gpu/amdgpu.rst

+6 −3
Original line number Diff line number Diff line
@@ -197,11 +197,14 @@ pp_power_profile_mode 
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

   :doc: pp_power_profile_mode



busy_percent

~~~~~~~~~~~~

*_busy_percent

~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

   :doc: busy_percent

   :doc: gpu_busy_percent



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

   :doc: mem_busy_percent



GPU Product Information

=======================

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

+2 −2
Original line number Diff line number Diff line
@@ -696,7 +696,7 @@ static ssize_t amdgpu_set_pp_table(struct device *dev, 
 * default power levels, write "r" (reset) to the file to reset them.

 *

 *

 * < For Vega20 >

 * < For Vega20 and newer ASICs >

 *

 * Reading the file will display:

 *
@@ -1668,7 +1668,7 @@ static ssize_t amdgpu_set_pp_power_profile_mode(struct device *dev, 
}



/**

 * DOC: busy_percent

 * DOC: gpu_busy_percent

 *

 * The amdgpu driver provides a sysfs API for reading how busy the GPU

 * is as a percentage.  The file gpu_busy_percent is used for this.

drivers/gpu/drm/amd/amdkfd/kfd_priv.h

+2 −1
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ 
#include <drm/drm_file.h>

#include <drm/drm_drv.h>

#include <drm/drm_device.h>

#include <drm/drm_ioctl.h>

#include <kgd_kfd_interface.h>

#include <linux/swap.h>
@@ -1076,7 +1077,7 @@ static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd) 
#if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF)

	struct drm_device *ddev = kfd->ddev;



	return devcgroup_check_permission(DEVCG_DEV_CHAR, ddev->driver->major,

	return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR,

					  ddev->render->index,

					  DEVCG_ACC_WRITE | DEVCG_ACC_READ);

#else

drivers/gpu/drm/amd/display/dc/dsc/Makefile

+0 −2
Original line number Diff line number Diff line
@@ -28,8 +28,6 @@ endif 
endif



CFLAGS_$(AMDDALPATH)/dc/dsc/rc_calc.o := $(dsc_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dsc/rc_calc_dpi.o := $(dsc_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dsc/dc_dsc.o := $(dsc_ccflags)



DSC = dc_dsc.o rc_calc.o rc_calc_dpi.o

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

+2 −16
Original line number Diff line number Diff line
@@ -22,10 +22,12 @@ 
 * Author: AMD

 */



#include <drm/drm_dsc.h>

#include "dc_hw_types.h"

#include "dsc.h"

#include <drm/drm_dp_helper.h>

#include "dc.h"

#include "rc_calc.h"



/* This module's internal functions */
@@ -304,22 +306,6 @@ static inline uint32_t dsc_div_by_10_round_up(uint32_t value) 
	return (value + 9) / 10;

}



static inline uint32_t calc_dsc_bpp_x16(uint32_t stream_bandwidth_kbps, uint32_t pix_clk_100hz, uint32_t bpp_increment_div)

{

	uint32_t dsc_target_bpp_x16;

	float f_dsc_target_bpp;

	float f_stream_bandwidth_100bps = stream_bandwidth_kbps * 10.0f;

	uint32_t precision = bpp_increment_div; // bpp_increment_div is actually precision



	f_dsc_target_bpp = f_stream_bandwidth_100bps / pix_clk_100hz;



	// Round down to the nearest precision stop to bring it into DSC spec range

	dsc_target_bpp_x16 = (uint32_t)(f_dsc_target_bpp * precision);

	dsc_target_bpp_x16 = (dsc_target_bpp_x16 * 16) / precision;



	return dsc_target_bpp_x16;

}



/* Get DSC bandwidth range based on [min_bpp, max_bpp] target bitrate range, and timing's pixel clock

 * and uncompressed bandwidth.

 */

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