Commit 62c79bb3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM 64-bit DT updates from Olof Johansson:
 "This is the first release where we split up the 64-bit contributions a
  bit more, and in particular we are having a separate DT branch for
  them.

  Contents:

   - New devices added to Broadcom NorthStar2
   - Misc fixes for Exynos7 boards
   - QCOM updates for MSM8916
   - Rockchip tweaks for rk3368 SoC and eval board
   - A series of fixes for APM X-Gene v1 and v2
   - Renesas R8A7795 CPU/PSCI additions
   - Marvell Berlin4CT PSCI, cpuidle, watchdog portions
   - Freescale LS1043a SoC and dev board support

  + some treewide or other misc changes"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (104 commits)
  dts/ls2080a: Update DTSI to add support of SP805 WDT
  Documentation: DT: Add entry for ARM SP805-WDT
  arm64: dts: X-Gene v2: I2C1 clock is always on
  arm64: dts: X-Gene v1: I2C0 clock is always on
  arm64: dts: Fix to use standard DT node names for X-Gene 1 and X-Gene 2 platforms
  arm64: dts: hikey: add label properties to UARTs
  arm64: dts: apq8016-sbc: add label properties for UART, I2C, and SPI
  arm64: dts: apq8016-sbc: enable UART0 on LS connector
  arm64: dts: juno: Add idle-states to device tree
  arm64: dts: Added syscon-reboot node for FSL's LS2080A SoC
  arm64: dts: add LS1043a-RDB board support
  arm64: dts: add Freescale LS1043a SoC support
  Documentation: DT: Add entry for Freescale LS1043a-RDB board
  arm64: dts: uniphier: add PH1-LD10 SoC/board support
  arm64: renesas: r8a7795: fix SATA clock assignment
  arm64: dts: salvator-x: Enable SATA controller
  arm64: dts: r8a7795: Add SATA controller node
  arm64: renesas: r8a7795: add internal delay for i2c IPs
  arm64: renesas: salvator-x: Add board part number to DT bindings
  arm64: dts: r8a7795: Add pmu device nodes
  ...
parents 6d1c2448 d07822a7

Documentation/devicetree/bindings/arm/fsl.txt

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Original line number Diff line number Diff line
@@ -131,6 +131,10 @@ Example: 
Freescale ARMv8 based Layerscape SoC family Device Tree Bindings

----------------------------------------------------------------



LS1043A ARMv8 based RDB Board

Required root node properties:

    - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";



LS2080A ARMv8 based Simulator model

Required root node properties:

    - compatible = "fsl,ls2080a-simu", "fsl,ls2080a";

Documentation/devicetree/bindings/arm/rockchip.txt

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Original line number Diff line number Diff line
@@ -87,6 +87,10 @@ Rockchip platforms device tree bindings 
		     "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",

		     "google,veyron-speedy", "google,veyron", "rockchip,rk3288";



- Rockchip RK3368 evb:

    Required root node properties:

      - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";



- Rockchip R88 board:

    Required root node properties:

      - compatible = "rockchip,r88", "rockchip,rk3368";

Documentation/devicetree/bindings/arm/shmobile.txt

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@@ -27,6 +27,8 @@ SoCs: 
    compatible = "renesas,r8a7793"

  - R-Car E2 (R8A77940)

    compatible = "renesas,r8a7794"

  - R-Car H3 (R8A77950)

    compatible = "renesas,r8a7795"





Boards:
@@ -57,5 +59,7 @@ Boards: 
    compatible = "renesas,marzen", "renesas,r8a7779"

  - Porter (M2-LCDP)

    compatible = "renesas,porter", "renesas,r8a7791"

  - Salvator-X (RTP0RC7795SIPB0010S)

    compatible = "renesas,salvator-x", "renesas,r8a7795";

  - SILK (RTP0RC7794LCB00011S)

    compatible = "renesas,silk", "renesas,r8a7794"

Documentation/devicetree/bindings/watchdog/sp805-wdt.txt

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* ARM SP805 Watchdog Timer (WDT) Controller



SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that

can be used to identify the peripheral type, vendor, and revision.

This value can be used for driver matching.



As SP805 WDT is a primecell IP, it follows the base bindings specified in

'arm/primecell.txt'



Required properties:

- compatible : Should be "arm,sp805-wdt", "arm,primecell"

- reg : Base address and size of the watchdog timer registers.

- clocks : From common clock binding.

           First clock is PCLK and the second is WDOGCLK.

           WDOGCLK can be equal to or be a sub-multiple of the PCLK frequency.

- clock-names : From common clock binding.

                Shall be "apb_pclk" for first clock and "wdog_clk" for the

                second one.



Optional properties:

- interrupts : Should specify WDT interrupt number.



Examples:



		cluster1_core0_watchdog: wdt@c000000 {

			compatible = "arm,sp805-wdt", "arm,primecell";

			reg = <0x0 0xc000000 0x0 0x1000>;

			clocks = <&clockgen 4 3>, <&clockgen 4 3>;

			clock-names = "apb_pclk", "wdog_clk";

		};

MAINTAINERS

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Original line number Diff line number Diff line
@@ -1435,6 +1435,15 @@ M: Lennert Buytenhek <kernel@wantstofly.org> 
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

S:	Maintained



ARM/RENESAS ARM64 ARCHITECTURE

M:	Simon Horman <horms@verge.net.au>

M:	Magnus Damm <magnus.damm@gmail.com>

L:	linux-sh@vger.kernel.org

Q:	http://patchwork.kernel.org/project/linux-sh/list/

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next

S:	Supported

F:	arch/arm64/boot/dts/renesas/



ARM/RISCPC ARCHITECTURE

M:	Russell King <linux@arm.linux.org.uk>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -1663,6 +1672,7 @@ F: arch/arm/boot/dts/uniphier* 
F:	arch/arm/include/asm/hardware/cache-uniphier.h

F:	arch/arm/mach-uniphier/

F:	arch/arm/mm/cache-uniphier.c

F:	arch/arm64/boot/dts/socionext/

F:	drivers/i2c/busses/i2c-uniphier*

F:	drivers/pinctrl/uniphier/

F:	drivers/tty/serial/8250/8250_uniphier.c

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