Commit 62bf8ae8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-for-4.16-memory' of... 

Merge tag 'tegra-for-4.16-memory' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Pull "memory: tegra: Changes for v4.16-rc1" from Thierry Reding:

The Tegra memory controller driver will now instruct the SMMU driver to
create groups, which will make it easier for device drivers to share an
IOMMU domain between multiple devices.

Initial Tegra186 support is also added in a separate driver.

* tag 'tegra-for-4.16-memory' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  iommu/tegra-smmu: Fix return value check in tegra_smmu_group_get()
  iommu/tegra: Allow devices to be grouped
  memory: tegra: Create SMMU display groups
  memory: tegra: Add Tegra186 support
  dt-bindings: memory: Add Tegra186 support
  dt-bindings: misc: Add Tegra186 MISC registers bindings
parents bad19e0d 83476bfa

Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.txt

+2 −0
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ Required properties: 
- clock-names: Must include the following entries:

  - mc: the module's clock input

- interrupts: The interrupt outputs from the controller.



Required properties for Tegra30, Tegra114, Tegra124, Tegra132 and Tegra210:

- #iommu-cells: Should be 1. The single cell of the IOMMU specifier defines

  the SWGROUP of the master.

Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt

0 → 100644
+12 −0
Original line number Diff line number Diff line 
NVIDIA Tegra186 MISC register block



The MISC register block found on Tegra186 SoCs contains registers that can be

used to identify a given chip and various strapping options.



Required properties:

- compatible: Must be:

  - Tegra186: "nvidia,tegra186-misc"

- reg: Should contain 2 entries: The first entry gives the physical address

       and length of the register region which contains revision and debug

       features. The second entry specifies the physical address and length

       of the register region indicating the strapping options.

drivers/iommu/tegra-smmu.c

+120 −4
Original line number Diff line number Diff line
@@ -20,6 +20,12 @@ 
#include <soc/tegra/ahb.h>

#include <soc/tegra/mc.h>



struct tegra_smmu_group {

	struct list_head list;

	const struct tegra_smmu_group_soc *soc;

	struct iommu_group *group;

};



struct tegra_smmu {

	void __iomem *regs;

	struct device *dev;
@@ -27,6 +33,8 @@ struct tegra_smmu { 
	struct tegra_mc *mc;

	const struct tegra_smmu_soc *soc;



	struct list_head groups;



	unsigned long pfn_mask;

	unsigned long tlb_mask;
@@ -703,19 +711,47 @@ static struct tegra_smmu *tegra_smmu_find(struct device_node *np) 
	return mc->smmu;

}



static int tegra_smmu_configure(struct tegra_smmu *smmu, struct device *dev,

				struct of_phandle_args *args)

{

	const struct iommu_ops *ops = smmu->iommu.ops;

	int err;



	err = iommu_fwspec_init(dev, &dev->of_node->fwnode, ops);

	if (err < 0) {

		dev_err(dev, "failed to initialize fwspec: %d\n", err);

		return err;

	}



	err = ops->of_xlate(dev, args);

	if (err < 0) {

		dev_err(dev, "failed to parse SW group ID: %d\n", err);

		iommu_fwspec_free(dev);

		return err;

	}



	return 0;

}



static int tegra_smmu_add_device(struct device *dev)

{

	struct device_node *np = dev->of_node;

	struct tegra_smmu *smmu = NULL;

	struct iommu_group *group;

	struct of_phandle_args args;

	unsigned int index = 0;

	int err;



	while (of_parse_phandle_with_args(np, "iommus", "#iommu-cells", index,

					  &args) == 0) {

		struct tegra_smmu *smmu;



		smmu = tegra_smmu_find(args.np);

		if (smmu) {

			err = tegra_smmu_configure(smmu, dev, &args);

			of_node_put(args.np);



			if (err < 0)

				return err;



			/*

			 * Only a single IOMMU master interface is currently

			 * supported by the Linux kernel, so abort after the
@@ -728,9 +764,13 @@ static int tegra_smmu_add_device(struct device *dev) 
			break;

		}



		of_node_put(args.np);

		index++;

	}



	if (!smmu)

		return -ENODEV;



	group = iommu_group_get_for_dev(dev);

	if (IS_ERR(group))

		return PTR_ERR(group);
@@ -751,6 +791,80 @@ static void tegra_smmu_remove_device(struct device *dev) 
	iommu_group_remove_device(dev);

}



static const struct tegra_smmu_group_soc *

tegra_smmu_find_group(struct tegra_smmu *smmu, unsigned int swgroup)

{

	unsigned int i, j;



	for (i = 0; i < smmu->soc->num_groups; i++)

		for (j = 0; j < smmu->soc->groups[i].num_swgroups; j++)

			if (smmu->soc->groups[i].swgroups[j] == swgroup)

				return &smmu->soc->groups[i];



	return NULL;

}



static struct iommu_group *tegra_smmu_group_get(struct tegra_smmu *smmu,

						unsigned int swgroup)

{

	const struct tegra_smmu_group_soc *soc;

	struct tegra_smmu_group *group;



	soc = tegra_smmu_find_group(smmu, swgroup);

	if (!soc)

		return NULL;



	mutex_lock(&smmu->lock);



	list_for_each_entry(group, &smmu->groups, list)

		if (group->soc == soc) {

			mutex_unlock(&smmu->lock);

			return group->group;

		}



	group = devm_kzalloc(smmu->dev, sizeof(*group), GFP_KERNEL);

	if (!group) {

		mutex_unlock(&smmu->lock);

		return NULL;

	}



	INIT_LIST_HEAD(&group->list);

	group->soc = soc;



	group->group = iommu_group_alloc();

	if (IS_ERR(group->group)) {

		devm_kfree(smmu->dev, group);

		mutex_unlock(&smmu->lock);

		return NULL;

	}



	list_add_tail(&group->list, &smmu->groups);

	mutex_unlock(&smmu->lock);



	return group->group;

}



static struct iommu_group *tegra_smmu_device_group(struct device *dev)

{

	struct iommu_fwspec *fwspec = dev->iommu_fwspec;

	struct tegra_smmu *smmu = dev->archdata.iommu;

	struct iommu_group *group;



	group = tegra_smmu_group_get(smmu, fwspec->ids[0]);

	if (!group)

		group = generic_device_group(dev);



	return group;

}



static int tegra_smmu_of_xlate(struct device *dev,

			       struct of_phandle_args *args)

{

	u32 id = args->args[0];



	return iommu_fwspec_add_ids(dev, &id, 1);

}



static const struct iommu_ops tegra_smmu_ops = {

	.capable = tegra_smmu_capable,

	.domain_alloc = tegra_smmu_domain_alloc,
@@ -759,12 +873,12 @@ static const struct iommu_ops tegra_smmu_ops = { 
	.detach_dev = tegra_smmu_detach_dev,

	.add_device = tegra_smmu_add_device,

	.remove_device = tegra_smmu_remove_device,

	.device_group = generic_device_group,

	.device_group = tegra_smmu_device_group,

	.map = tegra_smmu_map,

	.unmap = tegra_smmu_unmap,

	.map_sg = default_iommu_map_sg,

	.iova_to_phys = tegra_smmu_iova_to_phys,



	.of_xlate = tegra_smmu_of_xlate,

	.pgsize_bitmap = SZ_4K,

};
@@ -913,6 +1027,7 @@ struct tegra_smmu *tegra_smmu_probe(struct device *dev, 
	if (!smmu->asids)

		return ERR_PTR(-ENOMEM);



	INIT_LIST_HEAD(&smmu->groups);

	mutex_init(&smmu->lock);



	smmu->regs = mc->regs;
@@ -954,6 +1069,7 @@ struct tegra_smmu *tegra_smmu_probe(struct device *dev, 
		return ERR_PTR(err);



	iommu_device_set_ops(&smmu->iommu, &tegra_smmu_ops);

	iommu_device_set_fwnode(&smmu->iommu, dev->fwnode);



	err = iommu_device_register(&smmu->iommu);

	if (err) {

drivers/memory/tegra/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -10,3 +10,4 @@ tegra-mc-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o 
obj-$(CONFIG_TEGRA_MC) += tegra-mc.o



obj-$(CONFIG_TEGRA124_EMC) += tegra124-emc.o

obj-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o

drivers/memory/tegra/tegra114.c

+15 −0
Original line number Diff line number Diff line
@@ -912,11 +912,26 @@ static const struct tegra_smmu_swgroup tegra114_swgroups[] = { 
	{ .name = "tsec",      .swgroup = TEGRA_SWGROUP_TSEC,      .reg = 0x294 },

};



static const unsigned int tegra114_group_display[] = {

	TEGRA_SWGROUP_DC,

	TEGRA_SWGROUP_DCB,

};



static const struct tegra_smmu_group_soc tegra114_groups[] = {

	{

		.name = "display",

		.swgroups = tegra114_group_display,

		.num_swgroups = ARRAY_SIZE(tegra114_group_display),

	},

};



static const struct tegra_smmu_soc tegra114_smmu_soc = {

	.clients = tegra114_mc_clients,

	.num_clients = ARRAY_SIZE(tegra114_mc_clients),

	.swgroups = tegra114_swgroups,

	.num_swgroups = ARRAY_SIZE(tegra114_swgroups),

	.groups = tegra114_groups,

	.num_groups = ARRAY_SIZE(tegra114_groups),

	.supports_round_robin_arbitration = false,

	.supports_request_limit = false,

	.num_tlb_lines = 32,

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