Commit 62a202d7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm 

Pull ARM fixes from Russell King:
 "Another few ARM fixes.  Fabrice fixed the L2 cache DT parsing to allow
  prefetch configuration to be specified even when the cache size
  parsing fails.

  Laura noticed that the setting of page attributes wasn't working for
  modules due to is_module_addr() always returning false.

  Marc Gonzalez (aka Mason) noticed a potential latent bug with the way
  we read one of the CPUID registers (where we could attempt to read a
  non-present CPUID register which may fault.)

  I've fixed an issue where 32-bit DMA masks were failing with memory
  which extended to the top of physical address space, and I've also
  added debugging output of the page tables when we hit a data access
  exception which we don't specifically handle - prompted by the lack of
  information in a bug report"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8313/1: Use read_cpuid_ext() macro instead of inline asm
  ARM: 8311/1: Don't use is_module_addr in setting page attributes
  ARM: 8310/1: l2c: Fix prefetch settings dt parsing
  ARM: dump pgd, pmd and pte states on unhandled data abort faults
  ARM: dma-api: fix off-by-one error in __dma_supported()
parents b314acac 526299ce

arch/arm/kernel/setup.c

+1 −4
Original line number Diff line number Diff line
@@ -246,12 +246,9 @@ static int __get_cpu_architecture(void) 
		if (cpu_arch)

			cpu_arch += CPU_ARCH_ARMv3;

	} else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {

		unsigned int mmfr0;



		/* Revised CPUID format. Read the Memory Model Feature

		 * Register 0 and check for VMSAv7 or PMSAv7 */

		asm("mrc	p15, 0, %0, c0, c1, 4"

		    : "=r" (mmfr0));

		unsigned int mmfr0 = read_cpuid_ext(CPUID_EXT_MMFR0);

		if ((mmfr0 & 0x0000000f) >= 0x00000003 ||

		    (mmfr0 & 0x000000f0) >= 0x00000030)

			cpu_arch = CPU_ARCH_ARMv7;

arch/arm/mm/cache-l2x0.c

+16 −17
Original line number Diff line number Diff line
@@ -1131,9 +1131,7 @@ static void __init l2c310_of_parse(const struct device_node *np, 
	}



	ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K);

	if (ret)

		return;



	if (!ret) {

		switch (assoc) {

		case 16:

			*aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
@@ -1149,6 +1147,7 @@ static void __init l2c310_of_parse(const struct device_node *np, 
			       assoc);

			break;

		}

	}



	prefetch = l2x0_saved_regs.prefetch_ctrl;

arch/arm/mm/dma-mapping.c

+1 −1
Original line number Diff line number Diff line
@@ -171,7 +171,7 @@ static int __dma_supported(struct device *dev, u64 mask, bool warn) 
	 */

	if (sizeof(mask) != sizeof(dma_addr_t) &&

	    mask > (dma_addr_t)~0 &&

	    dma_to_pfn(dev, ~0) < max_pfn) {

	    dma_to_pfn(dev, ~0) < max_pfn - 1) {

		if (warn) {

			dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",

				 mask);

arch/arm/mm/fault.c

+1 −0
Original line number Diff line number Diff line
@@ -552,6 +552,7 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 


	pr_alert("Unhandled fault: %s (0x%03x) at 0x%08lx\n",

		inf->name, fsr, addr);

	show_pte(current->mm, addr);



	info.si_signo = inf->sig;

	info.si_errno = 0;

arch/arm/mm/pageattr.c

+4 −1
Original line number Diff line number Diff line
@@ -49,7 +49,10 @@ static int change_memory_common(unsigned long addr, int numpages, 
		WARN_ON_ONCE(1);

	}



	if (!is_module_address(start) || !is_module_address(end - 1))

	if (start < MODULES_VADDR || start >= MODULES_END)

		return -EINVAL;



	if (end < MODULES_VADDR || start >= MODULES_END)

		return -EINVAL;



	data.set_mask = set_mask;

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