Commit 6251e65f authored by Martin Bugge's avatar Martin Bugge Committed by Mauro Carvalho Chehab
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[media] adv7842: corrected setting of cp-register 0x91 and 0x8f 



Bit 6 of register 0x8f was cleared incorrectly (must be 1), and bit 4
of register 0x91 was set incorrectly (must be 0).

These bits are undocumented, so we shouldn't modify them to values different
from what the datasheet specifies.

Signed-off-by: default avatarMartin Bugge <marbugge@cisco.com>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent e78d834a

drivers/media/i2c/adv7842.c

+2 −2
Original line number Diff line number Diff line
@@ -927,7 +927,7 @@ static int configure_predefined_video_timings(struct v4l2_subdev *sd, 
	cp_write(sd, 0x27, 0x00);

	cp_write(sd, 0x28, 0x00);

	cp_write(sd, 0x29, 0x00);

	cp_write(sd, 0x8f, 0x00);

	cp_write(sd, 0x8f, 0x40);

	cp_write(sd, 0x90, 0x00);

	cp_write(sd, 0xa5, 0x00);

	cp_write(sd, 0xa6, 0x00);
@@ -1408,7 +1408,7 @@ static int adv7842_s_dv_timings(struct v4l2_subdev *sd, 


	state->timings = *timings;



	cp_write(sd, 0x91, bt->interlaced ? 0x50 : 0x10);

	cp_write(sd, 0x91, bt->interlaced ? 0x40 : 0x00);



	/* Use prim_mode and vid_std when available */

	err = configure_predefined_video_timings(sd, timings);

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