Commit 61fe2d75 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'usb-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next 



Felipe writes:

usb: patches for v3.17 merge window

Surprisingly enough, while a big set of patches, the majority is
composed of cleanups (using devm_*, fixing sparse errors, moving
code around, adding const, etc).

The highlights are addition of new support for PLX USB338x devices,
and support for USB 2.0-only configurations of the DWC3 IP core.

Signed-of-by: default avatarFelipe Balbi <balbi@ti.com>
parents 499b3803 8346b33f

Documentation/DocBook/gadget.tmpl

+5 −5
Original line number Diff line number Diff line
@@ -556,11 +556,11 @@ been converted to this framework. 
Near-term plans include converting all of them, except for "gadgetfs".

</para>



!Edrivers/usb/gadget/f_acm.c

!Edrivers/usb/gadget/f_ecm.c

!Edrivers/usb/gadget/f_subset.c

!Edrivers/usb/gadget/f_obex.c

!Edrivers/usb/gadget/f_serial.c

!Edrivers/usb/gadget/function/f_acm.c

!Edrivers/usb/gadget/function/f_ecm.c

!Edrivers/usb/gadget/function/f_subset.c

!Edrivers/usb/gadget/function/f_obex.c

!Edrivers/usb/gadget/function/f_serial.c



</sect1>

drivers/usb/dwc3/core.c

+32 −19
Original line number Diff line number Diff line
@@ -386,6 +386,13 @@ static int dwc3_core_init(struct dwc3 *dwc) 
	}

	dwc->revision = reg;



	/* Handle USB2.0-only core configuration */

	if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==

			DWC3_GHWPARAMS3_SSPHY_IFC_DIS) {

		if (dwc->maximum_speed == USB_SPEED_SUPER)

			dwc->maximum_speed = USB_SPEED_HIGH;

	}



	/* issue device SoftReset too */

	timeout = jiffies + msecs_to_jiffies(500);

	dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
@@ -656,6 +663,31 @@ static int dwc3_probe(struct platform_device *pdev) 
		return -ENODEV;

	}



	dwc->xhci_resources[0].start = res->start;

	dwc->xhci_resources[0].end = dwc->xhci_resources[0].start +

					DWC3_XHCI_REGS_END;

	dwc->xhci_resources[0].flags = res->flags;

	dwc->xhci_resources[0].name = res->name;



	res->start += DWC3_GLOBALS_REGS_START;



	/*

	 * Request memory region but exclude xHCI regs,

	 * since it will be requested by the xhci-plat driver.

	 */

	regs = devm_ioremap_resource(dev, res);

	if (IS_ERR(regs))

		return PTR_ERR(regs);



	dwc->regs	= regs;

	dwc->regs_size	= resource_size(res);

	/*

	 * restore res->start back to its original value so that,

	 * in case the probe is deferred, we don't end up getting error in

	 * request the memory region the next time probe is called.

	 */

	res->start -= DWC3_GLOBALS_REGS_START;



	if (node) {

		dwc->maximum_speed = of_usb_get_maximum_speed(node);
@@ -676,28 +708,9 @@ static int dwc3_probe(struct platform_device *pdev) 
	if (ret)

		return ret;



	dwc->xhci_resources[0].start = res->start;

	dwc->xhci_resources[0].end = dwc->xhci_resources[0].start +

					DWC3_XHCI_REGS_END;

	dwc->xhci_resources[0].flags = res->flags;

	dwc->xhci_resources[0].name = res->name;



	res->start += DWC3_GLOBALS_REGS_START;



	/*

	 * Request memory region but exclude xHCI regs,

	 * since it will be requested by the xhci-plat driver.

	 */

	regs = devm_ioremap_resource(dev, res);

	if (IS_ERR(regs))

		return PTR_ERR(regs);



	spin_lock_init(&dwc->lock);

	platform_set_drvdata(pdev, dwc);



	dwc->regs	= regs;

	dwc->regs_size	= resource_size(res);



	dev->dma_mask	= dev->parent->dma_mask;

	dev->dma_parms	= dev->parent->dma_parms;

	dma_set_coherent_mask(dev, dev->parent->coherent_dma_mask);

drivers/usb/dwc3/core.h

+13 −0
Original line number Diff line number Diff line
@@ -191,6 +191,19 @@ 
#define DWC3_GHWPARAMS1_PWROPT(n)	((n) << 24)

#define DWC3_GHWPARAMS1_PWROPT_MASK	DWC3_GHWPARAMS1_PWROPT(3)



/* Global HWPARAMS3 Register */

#define DWC3_GHWPARAMS3_SSPHY_IFC(n)		((n) & 3)

#define DWC3_GHWPARAMS3_SSPHY_IFC_DIS		0

#define DWC3_GHWPARAMS3_SSPHY_IFC_ENA		1

#define DWC3_GHWPARAMS3_HSPHY_IFC(n)		(((n) & (3 << 2)) >> 2)

#define DWC3_GHWPARAMS3_HSPHY_IFC_DIS		0

#define DWC3_GHWPARAMS3_HSPHY_IFC_UTMI		1

#define DWC3_GHWPARAMS3_HSPHY_IFC_ULPI		2

#define DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI	3

#define DWC3_GHWPARAMS3_FSPHY_IFC(n)		(((n) & (3 << 4)) >> 4)

#define DWC3_GHWPARAMS3_FSPHY_IFC_DIS		0

#define DWC3_GHWPARAMS3_FSPHY_IFC_ENA		1



/* Global HWPARAMS4 Register */

#define DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS(n)	(((n) & (0x0f << 13)) >> 13)

#define DWC3_MAX_HIBER_SCRATCHBUFS		15

drivers/usb/dwc3/dwc3-omap.c

+86 −86
Original line number Diff line number Diff line
@@ -77,10 +77,6 @@ 
#define USBOTGSS_DEV_EBC_EN			0x0110

#define USBOTGSS_DEBUG_OFFSET			0x0600



/* REVISION REGISTER */

#define USBOTGSS_REVISION_XMAJOR(reg)		((reg >> 8) & 0x7)

#define USBOTGSS_REVISION_XMAJOR1		1

#define USBOTGSS_REVISION_XMAJOR2		2

/* SYSCONFIG REGISTER */

#define USBOTGSS_SYSCONFIG_DMADISABLE		(1 << 16)
@@ -129,7 +125,6 @@ struct dwc3_omap { 
	u32			irq_eoi_offset;

	u32			debug_offset;

	u32			irq0_offset;

	u32			revision;



	u32			dma_status:1;
@@ -383,6 +378,87 @@ static int dwc3_omap_vbus_notifier(struct notifier_block *nb, 
	return NOTIFY_DONE;

}



static void dwc3_omap_map_offset(struct dwc3_omap *omap)

{

	struct device_node	*node = omap->dev->of_node;



	/*

	 * Differentiate between OMAP5 and AM437x.

	 *

	 * For OMAP5(ES2.0) and AM437x wrapper revision is same, even

	 * though there are changes in wrapper register offsets.

	 *

	 * Using dt compatible to differentiate AM437x.

	 */

	if (of_device_is_compatible(node, "ti,am437x-dwc3")) {

		omap->irq_eoi_offset = USBOTGSS_EOI_OFFSET;

		omap->irq0_offset = USBOTGSS_IRQ0_OFFSET;

		omap->irqmisc_offset = USBOTGSS_IRQMISC_OFFSET;

		omap->utmi_otg_offset = USBOTGSS_UTMI_OTG_OFFSET;

		omap->debug_offset = USBOTGSS_DEBUG_OFFSET;

	}

}



static void dwc3_omap_set_utmi_mode(struct dwc3_omap *omap)

{

	u32			reg;

	struct device_node	*node = omap->dev->of_node;

	int			utmi_mode = 0;



	reg = dwc3_omap_read_utmi_status(omap);



	of_property_read_u32(node, "utmi-mode", &utmi_mode);



	switch (utmi_mode) {

	case DWC3_OMAP_UTMI_MODE_SW:

		reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;

		break;

	case DWC3_OMAP_UTMI_MODE_HW:

		reg &= ~USBOTGSS_UTMI_OTG_STATUS_SW_MODE;

		break;

	default:

		dev_dbg(omap->dev, "UNKNOWN utmi mode %d\n", utmi_mode);

	}



	dwc3_omap_write_utmi_status(omap, reg);

}



static int dwc3_omap_extcon_register(struct dwc3_omap *omap)

{

	u32			ret;

	struct device_node	*node = omap->dev->of_node;

	struct extcon_dev	*edev;



	if (of_property_read_bool(node, "extcon")) {

		edev = extcon_get_edev_by_phandle(omap->dev, 0);

		if (IS_ERR(edev)) {

			dev_vdbg(omap->dev, "couldn't get extcon device\n");

			return -EPROBE_DEFER;

		}



		omap->vbus_nb.notifier_call = dwc3_omap_vbus_notifier;

		ret = extcon_register_interest(&omap->extcon_vbus_dev,

					       edev->name, "USB",

					       &omap->vbus_nb);

		if (ret < 0)

			dev_vdbg(omap->dev, "failed to register notifier for USB\n");



		omap->id_nb.notifier_call = dwc3_omap_id_notifier;

		ret = extcon_register_interest(&omap->extcon_id_dev,

					       edev->name, "USB-HOST",

					       &omap->id_nb);

		if (ret < 0)

			dev_vdbg(omap->dev, "failed to register notifier for USB-HOST\n");



		if (extcon_get_cable_state(edev, "USB") == true)

			dwc3_omap_set_mailbox(omap, OMAP_DWC3_VBUS_VALID);

		if (extcon_get_cable_state(edev, "USB-HOST") == true)

			dwc3_omap_set_mailbox(omap, OMAP_DWC3_ID_GROUND);

	}



	return 0;

}



static int dwc3_omap_probe(struct platform_device *pdev)

{

	struct device_node	*node = pdev->dev.of_node;
@@ -390,15 +466,11 @@ static int dwc3_omap_probe(struct platform_device *pdev) 
	struct dwc3_omap	*omap;

	struct resource		*res;

	struct device		*dev = &pdev->dev;

	struct extcon_dev	*edev;

	struct regulator	*vbus_reg = NULL;



	int			ret;

	int			irq;



	int			utmi_mode = 0;

	int			x_major;



	u32			reg;



	void __iomem		*base;
@@ -448,58 +520,8 @@ static int dwc3_omap_probe(struct platform_device *pdev) 
		goto err0;

	}



	reg = dwc3_omap_readl(omap->base, USBOTGSS_REVISION);

	omap->revision = reg;

	x_major = USBOTGSS_REVISION_XMAJOR(reg);



	/* Differentiate between OMAP5 and AM437x */

	switch (x_major) {

	case USBOTGSS_REVISION_XMAJOR1:

	case USBOTGSS_REVISION_XMAJOR2:

		omap->irq_eoi_offset = 0;

		omap->irq0_offset = 0;

		omap->irqmisc_offset = 0;

		omap->utmi_otg_offset = 0;

		omap->debug_offset = 0;

		break;

	default:

		/* Default to the latest revision */

		omap->irq_eoi_offset = USBOTGSS_EOI_OFFSET;

		omap->irq0_offset = USBOTGSS_IRQ0_OFFSET;

		omap->irqmisc_offset = USBOTGSS_IRQMISC_OFFSET;

		omap->utmi_otg_offset = USBOTGSS_UTMI_OTG_OFFSET;

		omap->debug_offset = USBOTGSS_DEBUG_OFFSET;

		break;

	}



	/* For OMAP5(ES2.0) and AM437x x_major is 2 even though there are

	 * changes in wrapper registers, Using dt compatible for aegis

	 */



	if (of_device_is_compatible(node, "ti,am437x-dwc3")) {

		omap->irq_eoi_offset = USBOTGSS_EOI_OFFSET;

		omap->irq0_offset = USBOTGSS_IRQ0_OFFSET;

		omap->irqmisc_offset = USBOTGSS_IRQMISC_OFFSET;

		omap->utmi_otg_offset = USBOTGSS_UTMI_OTG_OFFSET;

		omap->debug_offset = USBOTGSS_DEBUG_OFFSET;

	}



	reg = dwc3_omap_read_utmi_status(omap);



	of_property_read_u32(node, "utmi-mode", &utmi_mode);



	switch (utmi_mode) {

	case DWC3_OMAP_UTMI_MODE_SW:

		reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;

		break;

	case DWC3_OMAP_UTMI_MODE_HW:

		reg &= ~USBOTGSS_UTMI_OTG_STATUS_SW_MODE;

		break;

	default:

		dev_dbg(dev, "UNKNOWN utmi mode %d\n", utmi_mode);

	}



	dwc3_omap_write_utmi_status(omap, reg);

	dwc3_omap_map_offset(omap);

	dwc3_omap_set_utmi_mode(omap);



	/* check the DMA Status */

	reg = dwc3_omap_readl(omap->base, USBOTGSS_SYSCONFIG);
@@ -515,31 +537,9 @@ static int dwc3_omap_probe(struct platform_device *pdev) 


	dwc3_omap_enable_irqs(omap);



	if (of_property_read_bool(node, "extcon")) {

		edev = extcon_get_edev_by_phandle(dev, 0);

		if (IS_ERR(edev)) {

			dev_vdbg(dev, "couldn't get extcon device\n");

			ret = -EPROBE_DEFER;

			goto err2;

		}



		omap->vbus_nb.notifier_call = dwc3_omap_vbus_notifier;

		ret = extcon_register_interest(&omap->extcon_vbus_dev,

			edev->name, "USB", &omap->vbus_nb);

		if (ret < 0)

			dev_vdbg(dev, "failed to register notifier for USB\n");

		omap->id_nb.notifier_call = dwc3_omap_id_notifier;

		ret = extcon_register_interest(&omap->extcon_id_dev, edev->name,

					 "USB-HOST", &omap->id_nb);

	ret = dwc3_omap_extcon_register(omap);

	if (ret < 0)

			dev_vdbg(dev,

				"failed to register notifier for USB-HOST\n");



		if (extcon_get_cable_state(edev, "USB") == true)

			dwc3_omap_set_mailbox(omap, OMAP_DWC3_VBUS_VALID);

		if (extcon_get_cable_state(edev, "USB-HOST") == true)

			dwc3_omap_set_mailbox(omap, OMAP_DWC3_ID_GROUND);

	}

		goto err2;



	ret = of_platform_populate(node, NULL, NULL, dev);

	if (ret) {

drivers/usb/dwc3/gadget.c

+3 −4
Original line number Diff line number Diff line
@@ -1971,8 +1971,7 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep, 
}



static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,

		struct dwc3_ep *dep, const struct dwc3_event_depevt *event,

		int start_new)

		struct dwc3_ep *dep, const struct dwc3_event_depevt *event)

{

	unsigned		status = 0;

	int			clean_busy;
@@ -2039,7 +2038,7 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc, 
			return;

		}



		dwc3_endpoint_transfer_complete(dwc, dep, event, 1);

		dwc3_endpoint_transfer_complete(dwc, dep, event);

		break;

	case DWC3_DEPEVT_XFERINPROGRESS:

		if (!usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
@@ -2048,7 +2047,7 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc, 
			return;

		}



		dwc3_endpoint_transfer_complete(dwc, dep, event, 0);

		dwc3_endpoint_transfer_complete(dwc, dep, event);

		break;

	case DWC3_DEPEVT_XFERNOTREADY:

		if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {

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