Commit 61fa60ff authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Move GT init to intel_gt.c 



Code in i915_gem_init_hw is all about GT init so move it to intel_gt.c
renaming to intel_gt_init_hw.

Existing intel_gt_init_hw is renamed to intel_gt_init_hw_early since it
is currently called from driver probe.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190910143823.10686-2-tvrtko.ursulin@linux.intel.com
parent 0c1279b5

drivers/gpu/drm/i915/gem/i915_gem_pm.c

+1 −1
Original line number Diff line number Diff line
@@ -242,7 +242,7 @@ void i915_gem_resume(struct drm_i915_private *i915) 
	mutex_lock(&i915->drm.struct_mutex);

	intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);



	if (i915_gem_init_hw(i915))

	if (intel_gt_init_hw(&i915->gt))

		goto err_wedged;



	/*

drivers/gpu/drm/i915/gt/intel_gt.c

+91 −1
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
#include "i915_drv.h"

#include "intel_gt.h"

#include "intel_gt_pm.h"

#include "intel_mocs.h"

#include "intel_uncore.h"

#include "intel_pm.h"
@@ -25,7 +26,7 @@ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915) 
	intel_uc_init_early(&gt->uc);

}



void intel_gt_init_hw(struct drm_i915_private *i915)

void intel_gt_init_hw_early(struct drm_i915_private *i915)

{

	i915->gt.ggtt = &i915->ggtt;
@@ -33,6 +34,95 @@ void intel_gt_init_hw(struct drm_i915_private *i915) 
	intel_gt_pm_disable(&i915->gt);

}



static void init_unused_ring(struct intel_gt *gt, u32 base)

{

	struct intel_uncore *uncore = gt->uncore;



	intel_uncore_write(uncore, RING_CTL(base), 0);

	intel_uncore_write(uncore, RING_HEAD(base), 0);

	intel_uncore_write(uncore, RING_TAIL(base), 0);

	intel_uncore_write(uncore, RING_START(base), 0);

}



static void init_unused_rings(struct intel_gt *gt)

{

	struct drm_i915_private *i915 = gt->i915;



	if (IS_I830(i915)) {

		init_unused_ring(gt, PRB1_BASE);

		init_unused_ring(gt, SRB0_BASE);

		init_unused_ring(gt, SRB1_BASE);

		init_unused_ring(gt, SRB2_BASE);

		init_unused_ring(gt, SRB3_BASE);

	} else if (IS_GEN(i915, 2)) {

		init_unused_ring(gt, SRB0_BASE);

		init_unused_ring(gt, SRB1_BASE);

	} else if (IS_GEN(i915, 3)) {

		init_unused_ring(gt, PRB1_BASE);

		init_unused_ring(gt, PRB2_BASE);

	}

}



int intel_gt_init_hw(struct intel_gt *gt)

{

	struct drm_i915_private *i915 = gt->i915;

	struct intel_uncore *uncore = gt->uncore;

	int ret;



	BUG_ON(!i915->kernel_context);

	ret = intel_gt_terminally_wedged(gt);

	if (ret)

		return ret;



	gt->last_init_time = ktime_get();



	/* Double layer security blanket, see i915_gem_init() */

	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);



	if (HAS_EDRAM(i915) && INTEL_GEN(i915) < 9)

		intel_uncore_rmw(uncore, HSW_IDICR, 0, IDIHASHMSK(0xf));



	if (IS_HASWELL(i915))

		intel_uncore_write(uncore,

				   MI_PREDICATE_RESULT_2,

				   IS_HSW_GT3(i915) ?

				   LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);



	/* Apply the GT workarounds... */

	intel_gt_apply_workarounds(gt);

	/* ...and determine whether they are sticking. */

	intel_gt_verify_workarounds(gt, "init");



	intel_gt_init_swizzling(gt);



	/*

	 * At least 830 can leave some of the unused rings

	 * "active" (ie. head != tail) after resume which

	 * will prevent c3 entry. Makes sure all unused rings

	 * are totally idle.

	 */

	init_unused_rings(gt);



	ret = i915_ppgtt_init_hw(gt);

	if (ret) {

		DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);

		goto out;

	}



	/* We can't enable contexts until all firmware is loaded */

	ret = intel_uc_init_hw(&gt->uc);

	if (ret) {

		i915_probe_error(i915, "Enabling uc failed (%d)\n", ret);

		goto out;

	}



	intel_mocs_init(gt);



out:

	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);

	return ret;

}



static void rmw_set(struct intel_uncore *uncore, i915_reg_t reg, u32 set)

{

	intel_uncore_rmw(uncore, reg, 0, set);

drivers/gpu/drm/i915/gt/intel_gt.h

+2 −1
Original line number Diff line number Diff line
@@ -28,7 +28,8 @@ static inline struct intel_gt *huc_to_gt(struct intel_huc *huc) 
}



void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);

void intel_gt_init_hw(struct drm_i915_private *i915);

void intel_gt_init_hw_early(struct drm_i915_private *i915);

int __must_check intel_gt_init_hw(struct intel_gt *gt);

int intel_gt_init(struct intel_gt *gt);

void intel_gt_driver_register(struct intel_gt *gt);

drivers/gpu/drm/i915/gt/intel_reset.c

+1 −1
Original line number Diff line number Diff line
@@ -972,7 +972,7 @@ void intel_gt_reset(struct intel_gt *gt, 
	 * was running at the time of the reset (i.e. we weren't VT

	 * switched away).

	 */

	ret = i915_gem_init_hw(gt->i915);

	ret = intel_gt_init_hw(gt);

	if (ret) {

		DRM_ERROR("Failed to initialise HW following reset (%d)\n",

			  ret);

drivers/gpu/drm/i915/i915_drv.c

+1 −1
Original line number Diff line number Diff line
@@ -1269,7 +1269,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) 
	if (ret)

		goto err_ggtt;



	intel_gt_init_hw(dev_priv);

	intel_gt_init_hw_early(dev_priv);



	ret = i915_ggtt_enable_hw(dev_priv);

	if (ret) {

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