Commit 61e208b1 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Fix sysfs pp_dpm_pcie bug on CI/VI 



when echo "01">pp_dpm_pcie
the pcie dpm will fix in highest link speed.
But user should expect auto speed between
level 0 and level1

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 337ecd6a

drivers/gpu/drm/amd/amdgpu/ci_dpm.c

+10 −7
Original line number Diff line number Diff line
@@ -6642,6 +6642,9 @@ static int ci_dpm_force_clock_level(void *handle, 
	if (adev->pm.dpm.forced_level != AMD_DPM_FORCED_LEVEL_MANUAL)

		return -EINVAL;



	if (mask == 0)

		return -EINVAL;



	switch (type) {

	case PP_SCLK:

		if (!pi->sclk_dpm_key_disabled)
@@ -6660,15 +6663,15 @@ static int ci_dpm_force_clock_level(void *handle, 
	case PP_PCIE:

	{

		uint32_t tmp = mask & pi->dpm_level_enable_mask.pcie_dpm_enable_mask;

		uint32_t level = 0;



		while (tmp >>= 1)

			level++;



		if (!pi->pcie_dpm_key_disabled)

		if (!pi->pcie_dpm_key_disabled) {

			if (fls(tmp) != ffs(tmp))

				amdgpu_ci_send_msg_to_smc(adev, PPSMC_MSG_PCIeDPM_UnForceLevel);

			else

				amdgpu_ci_send_msg_to_smc_with_parameter(adev,

					PPSMC_MSG_PCIeDPM_ForceLevel,

					level);

					fls(tmp) - 1);

		}

		break;

	}

	default:

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

+10 −7
Original line number Diff line number Diff line
@@ -4296,6 +4296,9 @@ static int smu7_force_clock_level(struct pp_hwmgr *hwmgr, 
{

	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);



	if (mask == 0)

		return -EINVAL;



	switch (type) {

	case PP_SCLK:

		if (!data->sclk_dpm_key_disabled)
@@ -4312,15 +4315,15 @@ static int smu7_force_clock_level(struct pp_hwmgr *hwmgr, 
	case PP_PCIE:

	{

		uint32_t tmp = mask & data->dpm_level_enable_mask.pcie_dpm_enable_mask;

		uint32_t level = 0;



		while (tmp >>= 1)

			level++;



		if (!data->pcie_dpm_key_disabled)

		if (!data->pcie_dpm_key_disabled) {

			if (fls(tmp) != ffs(tmp))

				smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PCIeDPM_UnForceLevel);

			else

				smum_send_msg_to_smc_with_parameter(hwmgr,

					PPSMC_MSG_PCIeDPM_ForceLevel,

					level);

					fls(tmp) - 1);

		}

		break;

	}

	default:

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