x86/mm/tlb: Restructure switch_mm_irqs_off() (61d0beb5) · Commits · 戴 / test

Move some code that will be needed for the lazy -> !lazy state transition when a lazy TLB CPU has gotten out of date. No functional changes, since the if (real_prev == next) branch always returns. Suggested-by:

Andy Lutomirski <luto@kernel.org> Signed-off-by:

Rik van Riel <riel@surriel.com> Acked-by:

Dave Hansen <dave.hansen@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: efault@gmx.de Cc: kernel-team@fb.com Link: http://lkml.kernel.org/r/20180716190337.26133-4-riel@surriel.com Signed-off-by:

Ingo Molnar <mingo@kernel.org>

arch/x86/mm/tlb.c

+30 −30

Original line number	Diff line number	Diff line
		@@ -187,6 +187,8 @@ void switch_mm_irqs_off(struct mm_struct prev, struct mm_struct next,
		u16 prev_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);
		unsigned cpu = smp_processor_id();
		u64 next_tlb_gen;
		bool need_flush;
		u16 new_asid;

		/*
		* NB: The scheduler will call us with prev == next when switching
		@@ -252,8 +254,6 @@ void switch_mm_irqs_off(struct mm_struct prev, struct mm_struct next,

		return;
		} else {
		u16 new_asid;
		bool need_flush;
		u64 last_ctx_id = this_cpu_read(cpu_tlbstate.last_ctx_id);

		/*
		@@ -297,6 +297,7 @@ void switch_mm_irqs_off(struct mm_struct prev, struct mm_struct next,
		next_tlb_gen = atomic64_read(&next->context.tlb_gen);

		choose_new_asid(next, next_tlb_gen, &new_asid, &need_flush);
		}

		if (need_flush) {
		this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id);
		@@ -330,7 +331,6 @@ void switch_mm_irqs_off(struct mm_struct prev, struct mm_struct next,

		this_cpu_write(cpu_tlbstate.loaded_mm, next);
		this_cpu_write(cpu_tlbstate.loaded_mm_asid, new_asid);
		}

		load_mm_cr4(next);
		switch_ldt(real_prev, next);

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