Merge branches 'pci/host-exynos', 'pci/host-imx6', 'pci/resource' and 'pci/misc' into next (617b4157) · Commits · 戴 / test

arch/arm/kernel/bios32.c

+12 −0

Original line number	Diff line number	Diff line
		@@ -545,6 +545,18 @@ void pci_common_init_dev(struct device parent, struct hw_pci hw)
		*/
		pci_bus_add_devices(bus);
		}

		list_for_each_entry(sys, &head, node) {
		struct pci_bus *bus = sys->bus;

		/* Configure PCI Express settings */
		if (bus && !pci_has_flag(PCI_PROBE_ONLY)) {
		struct pci_bus *child;

		list_for_each_entry(child, &bus->children, node)
		pcie_bus_configure_settings(child);
		}
		}
		}

		#ifndef CONFIG_PCI_HOST_ITE8152

drivers/edac/i82875p_edac.c

+1 −7

Original line number	Diff line number	Diff line
		@@ -275,7 +275,6 @@ static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
		{
		struct pci_dev *dev;
		void __iomem *window;
		int err;

		*ovrfl_pdev = NULL;
		*ovrfl_window = NULL;
		@@ -293,13 +292,8 @@ static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
		if (dev == NULL)
		return 1;

		err = pci_bus_add_device(dev);
		if (err) {
		i82875p_printk(KERN_ERR,
		"%s(): pci_bus_add_device() Failed\n",
		__func__);
		}
		pci_bus_assign_resources(dev->bus);
		pci_bus_add_device(dev);
		}

		*ovrfl_pdev = dev;

drivers/pci/bus.c

+2 −8

Original line number	Diff line number	Diff line
		@@ -235,7 +235,7 @@ void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { }
		*
		* This adds add sysfs entries and start device drivers
		*/
		int pci_bus_add_device(struct pci_dev *dev)
		void pci_bus_add_device(struct pci_dev *dev)
		{
		int retval;

		@@ -252,8 +252,6 @@ int pci_bus_add_device(struct pci_dev *dev)
		WARN_ON(retval < 0);

		dev->is_added = 1;

		return 0;
		}

		/**
		@@ -266,16 +264,12 @@ void pci_bus_add_devices(const struct pci_bus *bus)
		{
		struct pci_dev *dev;
		struct pci_bus *child;
		int retval;

		list_for_each_entry(dev, &bus->devices, bus_list) {
		/* Skip already-added devices */
		if (dev->is_added)
		continue;
		retval = pci_bus_add_device(dev);
		if (retval)
		dev_err(&dev->dev, "Error adding device (%d)\n",
		retval);
		pci_bus_add_device(dev);
		}

		list_for_each_entry(dev, &bus->devices, bus_list) {

drivers/pci/host/pci-exynos.c

+3 −4

Original line number	Diff line number	Diff line
		@@ -415,9 +415,7 @@ static irqreturn_t exynos_pcie_msi_irq_handler(int irq, void *arg)
		{
		struct pcie_port *pp = arg;

		dw_handle_msi_irq(pp);

		return IRQ_HANDLED;
		return dw_handle_msi_irq(pp);
		}

		static void exynos_pcie_msi_init(struct pcie_port *pp)
		@@ -511,7 +509,8 @@ static struct pcie_host_ops exynos_pcie_host_ops = {
		.host_init = exynos_pcie_host_init,
		};

		static int add_pcie_port(struct pcie_port pp, struct platform_device pdev)
		static int __init add_pcie_port(struct pcie_port *pp,
		struct platform_device *pdev)
		{
		int ret;

drivers/pci/host/pci-imx6.c

+55 −92

Original line number	Diff line number	Diff line
		@@ -25,6 +25,7 @@
		#include <linux/resource.h>
		#include <linux/signal.h>
		#include <linux/types.h>
		#include <linux/interrupt.h>

		#include "pcie-designware.h"

		@@ -32,13 +33,9 @@

		struct imx6_pcie {
		int reset_gpio;
		int power_on_gpio;
		int wake_up_gpio;
		int disable_gpio;
		struct clk *lvds_gate;
		struct clk *sata_ref_100m;
		struct clk *pcie_ref_125m;
		struct clk *pcie_axi;
		struct clk *pcie_bus;
		struct clk *pcie_phy;
		struct clk *pcie;
		struct pcie_port pp;
		struct regmap *iomuxc_gpr;
		void __iomem *mem_base;
		@@ -231,36 +228,27 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
		struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
		int ret;

		if (gpio_is_valid(imx6_pcie->power_on_gpio))
		gpio_set_value(imx6_pcie->power_on_gpio, 1);

		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
		IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
		IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);

		ret = clk_prepare_enable(imx6_pcie->sata_ref_100m);
		if (ret) {
		dev_err(pp->dev, "unable to enable sata_ref_100m\n");
		goto err_sata_ref;
		}

		ret = clk_prepare_enable(imx6_pcie->pcie_ref_125m);
		ret = clk_prepare_enable(imx6_pcie->pcie_phy);
		if (ret) {
		dev_err(pp->dev, "unable to enable pcie_ref_125m\n");
		goto err_pcie_ref;
		dev_err(pp->dev, "unable to enable pcie_phy clock\n");
		goto err_pcie_phy;
		}

		ret = clk_prepare_enable(imx6_pcie->lvds_gate);
		ret = clk_prepare_enable(imx6_pcie->pcie_bus);
		if (ret) {
		dev_err(pp->dev, "unable to enable lvds_gate\n");
		goto err_lvds_gate;
		dev_err(pp->dev, "unable to enable pcie_bus clock\n");
		goto err_pcie_bus;
		}

		ret = clk_prepare_enable(imx6_pcie->pcie_axi);
		ret = clk_prepare_enable(imx6_pcie->pcie);
		if (ret) {
		dev_err(pp->dev, "unable to enable pcie_axi\n");
		goto err_pcie_axi;
		dev_err(pp->dev, "unable to enable pcie clock\n");
		goto err_pcie;
		}

		/* allow the clocks to stabilize */
		@@ -274,13 +262,11 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
		}
		return 0;

		err_pcie_axi:
		clk_disable_unprepare(imx6_pcie->lvds_gate);
		err_lvds_gate:
		clk_disable_unprepare(imx6_pcie->pcie_ref_125m);
		err_pcie_ref:
		clk_disable_unprepare(imx6_pcie->sata_ref_100m);
		err_sata_ref:
		err_pcie:
		clk_disable_unprepare(imx6_pcie->pcie_bus);
		err_pcie_bus:
		clk_disable_unprepare(imx6_pcie->pcie_phy);
		err_pcie_phy:
		return ret;

		}
		@@ -329,6 +315,13 @@ static int imx6_pcie_wait_for_link(struct pcie_port *pp)
		return 0;
		}

		static irqreturn_t imx6_pcie_msi_handler(int irq, void *arg)
		{
		struct pcie_port *pp = arg;

		return dw_handle_msi_irq(pp);
		}

		static int imx6_pcie_start_link(struct pcie_port *pp)
		{
		struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
		@@ -403,6 +396,9 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
		dw_pcie_setup_rc(pp);

		imx6_pcie_start_link(pp);

		if (IS_ENABLED(CONFIG_PCI_MSI))
		dw_pcie_msi_init(pp);
		}

		static void imx6_pcie_reset_phy(struct pcie_port *pp)
		@@ -487,16 +483,26 @@ static struct pcie_host_ops imx6_pcie_host_ops = {
		.host_init = imx6_pcie_host_init,
		};

		static int imx6_add_pcie_port(struct pcie_port *pp,
		static int __init imx6_add_pcie_port(struct pcie_port *pp,
		struct platform_device *pdev)
		{
		int ret;

		pp->irq = platform_get_irq(pdev, 0);
		if (!pp->irq) {
		dev_err(&pdev->dev, "failed to get irq\n");
		if (IS_ENABLED(CONFIG_PCI_MSI)) {
		pp->msi_irq = platform_get_irq_byname(pdev, "msi");
		if (pp->msi_irq <= 0) {
		dev_err(&pdev->dev, "failed to get MSI irq\n");
		return -ENODEV;
		}

		ret = devm_request_irq(&pdev->dev, pp->msi_irq,
		imx6_pcie_msi_handler,
		IRQF_SHARED, "mx6-pcie-msi", pp);
		if (ret) {
		dev_err(&pdev->dev, "failed to request MSI irq\n");
		return -ENODEV;
		}
		}

		pp->root_bus_nr = -1;
		pp->ops = &imx6_pcie_host_ops;
		@@ -546,69 +552,26 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
		}
		}

		imx6_pcie->power_on_gpio = of_get_named_gpio(np, "power-on-gpio", 0);
		if (gpio_is_valid(imx6_pcie->power_on_gpio)) {
		ret = devm_gpio_request_one(&pdev->dev,
		imx6_pcie->power_on_gpio,
		GPIOF_OUT_INIT_LOW,
		"PCIe power enable");
		if (ret) {
		dev_err(&pdev->dev, "unable to get power-on gpio\n");
		return ret;
		}
		}

		imx6_pcie->wake_up_gpio = of_get_named_gpio(np, "wake-up-gpio", 0);
		if (gpio_is_valid(imx6_pcie->wake_up_gpio)) {
		ret = devm_gpio_request_one(&pdev->dev,
		imx6_pcie->wake_up_gpio,
		GPIOF_IN,
		"PCIe wake up");
		if (ret) {
		dev_err(&pdev->dev, "unable to get wake-up gpio\n");
		return ret;
		}
		}

		imx6_pcie->disable_gpio = of_get_named_gpio(np, "disable-gpio", 0);
		if (gpio_is_valid(imx6_pcie->disable_gpio)) {
		ret = devm_gpio_request_one(&pdev->dev,
		imx6_pcie->disable_gpio,
		GPIOF_OUT_INIT_HIGH,
		"PCIe disable endpoint");
		if (ret) {
		dev_err(&pdev->dev, "unable to get disable-ep gpio\n");
		return ret;
		}
		}

		/* Fetch clocks */
		imx6_pcie->lvds_gate = devm_clk_get(&pdev->dev, "lvds_gate");
		if (IS_ERR(imx6_pcie->lvds_gate)) {
		dev_err(&pdev->dev,
		"lvds_gate clock select missing or invalid\n");
		return PTR_ERR(imx6_pcie->lvds_gate);
		}

		imx6_pcie->sata_ref_100m = devm_clk_get(&pdev->dev, "sata_ref_100m");
		if (IS_ERR(imx6_pcie->sata_ref_100m)) {
		imx6_pcie->pcie_phy = devm_clk_get(&pdev->dev, "pcie_phy");
		if (IS_ERR(imx6_pcie->pcie_phy)) {
		dev_err(&pdev->dev,
		"sata_ref_100m clock source missing or invalid\n");
		return PTR_ERR(imx6_pcie->sata_ref_100m);
		"pcie_phy clock source missing or invalid\n");
		return PTR_ERR(imx6_pcie->pcie_phy);
		}

		imx6_pcie->pcie_ref_125m = devm_clk_get(&pdev->dev, "pcie_ref_125m");
		if (IS_ERR(imx6_pcie->pcie_ref_125m)) {
		imx6_pcie->pcie_bus = devm_clk_get(&pdev->dev, "pcie_bus");
		if (IS_ERR(imx6_pcie->pcie_bus)) {
		dev_err(&pdev->dev,
		"pcie_ref_125m clock source missing or invalid\n");
		return PTR_ERR(imx6_pcie->pcie_ref_125m);
		"pcie_bus clock source missing or invalid\n");
		return PTR_ERR(imx6_pcie->pcie_bus);
		}

		imx6_pcie->pcie_axi = devm_clk_get(&pdev->dev, "pcie_axi");
		if (IS_ERR(imx6_pcie->pcie_axi)) {
		imx6_pcie->pcie = devm_clk_get(&pdev->dev, "pcie");
		if (IS_ERR(imx6_pcie->pcie)) {
		dev_err(&pdev->dev,
		"pcie_axi clock source missing or invalid\n");
		return PTR_ERR(imx6_pcie->pcie_axi);
		"pcie clock source missing or invalid\n");
		return PTR_ERR(imx6_pcie->pcie);
		}

		/* Grab GPR config register range */

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