Commit 6137fed0 authored Sep 04, 2018 by Peter Zijlstra Committed by Ingo Molnar Apr 03, 2019

arch/tlb: Clean up simple architectures



For the architectures that do not implement their own tlb_flush() but
do already use the generic mmu_gather, there are two options:

 1) the platform has an efficient flush_tlb_range() and
    asm-generic/tlb.h doesn't need any overrides at all.

 2) the platform lacks an efficient flush_tlb_range() and
    we select MMU_GATHER_NO_RANGE to minimize full invalidates.

Convert all 'simple' architectures to one of these two forms.

alpha:	    has no range invalidate -> 2
arc:	    already used flush_tlb_range() -> 1
c6x:	    has no range invalidate -> 2
hexagon:    has an efficient flush_tlb_range() -> 1
            (flush_tlb_mm() is in fact a full range invalidate,
	     so no need to shoot down everything)
m68k:	    has inefficient flush_tlb_range() -> 2
microblaze: has no flush_tlb_range() -> 2
mips:	    has efficient flush_tlb_range() -> 1
	    (even though it currently seems to use flush_tlb_mm())
nds32:	    already uses flush_tlb_range() -> 1
nios2:	    has inefficient flush_tlb_range() -> 2
	    (no limit on range iteration)
openrisc:   has inefficient flush_tlb_range() -> 2
	    (no limit on range iteration)
parisc:	    already uses flush_tlb_range() -> 1
sparc32:    already uses flush_tlb_range() -> 1
unicore32:  has inefficient flush_tlb_range() -> 2
	    (no limit on range iteration)
xtensa:	    has efficient flush_tlb_range() -> 1

Note this also fixes a bug in the existing code for a number
platforms. Those platforms that did:

  tlb_end_vma() -> if (!full_mm) flush_tlb_*()
  tlb_flush -> if (full_mm) flush_tlb_mm()

missed the case of shift_arg_pages(), which doesn't have @fullmm set,
nor calls into tlb_*vma(), but still frees page-tables and thus needs
an invalidate. The new code handles this by detecting a non-empty
range, and either issuing the matching range invalidate or a full
invalidate, depending on the capabilities.

No change in behavior intended.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Guan Xuetao <gxt@pku.edu.cn>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Helge Deller <deller@gmx.de>
Cc: Jonas Bonn <jonas@southpole.se>
Cc: Ley Foon Tan <lftan@altera.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mark Salter <msalter@redhat.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Nick Piggin <npiggin@gmail.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: Rik van Riel <riel@surriel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent 7bb8709d

arch/alpha/Kconfig

+1 −0

Original line number	Diff line number	Diff line
		@@ -36,6 +36,7 @@ config ALPHA
		select ODD_RT_SIGACTION
		select OLD_SIGSUSPEND
		select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67
		select MMU_GATHER_NO_RANGE
		help
		The Alpha is a 64-bit general-purpose processor designed and
		marketed by the Digital Equipment Corporation of blessed memory,

arch/alpha/include/asm/tlb.h

+0 −6

Original line number	Diff line number	Diff line
		@@ -2,12 +2,6 @@
		#ifndef _ALPHA_TLB_H
		#define _ALPHA_TLB_H

		#define tlb_start_vma(tlb, vma) do { } while (0)
		#define tlb_end_vma(tlb, vma) do { } while (0)
		#define __tlb_remove_tlb_entry(tlb, pte, addr) do { } while (0)

		#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)

		#include <asm-generic/tlb.h>

		#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte)

arch/arc/include/asm/tlb.h

+0 −23

Original line number	Diff line number	Diff line
		@@ -9,29 +9,6 @@
		#ifndef _ASM_ARC_TLB_H
		#define _ASM_ARC_TLB_H

		#define tlb_flush(tlb) \
		do { \
		if (tlb->fullmm) \
		flush_tlb_mm((tlb)->mm); \
		} while (0)

		/*
		* This pair is called at time of munmap/exit to flush cache and TLB entries
		* for mappings being torn down.
		* 1) cache-flush part -implemented via tlb_start_vma( ) for VIPT aliasing D$
		* 2) tlb-flush part - implemted via tlb_end_vma( ) flushes the TLB range
		*
		* Note, read http://lkml.org/lkml/2004/1/15/6
		*/

		#define tlb_end_vma(tlb, vma) \
		do { \
		if (!tlb->fullmm) \
		flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
		} while (0)

		#define __tlb_remove_tlb_entry(tlb, ptep, address)

		#include <linux/pagemap.h>
		#include <asm-generic/tlb.h>

arch/c6x/Kconfig

+1 −0

Original line number	Diff line number	Diff line
		@@ -20,6 +20,7 @@ config C6X
		select GENERIC_CLOCKEVENTS
		select MODULES_USE_ELF_RELA
		select ARCH_NO_COHERENT_DMA_MMAP
		select MMU_GATHER_NO_RANGE if MMU

		config MMU
		def_bool n

arch/c6x/include/asm/tlb.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -2,8 +2,6 @@
		#ifndef _ASM_C6X_TLB_H
		#define _ASM_C6X_TLB_H

		#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)

		#include <asm-generic/tlb.h>

		#endif /* _ASM_C6X_TLB_H */

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