Commit 60f7bb82 authored by Sasha Neftin's avatar Sasha Neftin Committed by Tony Nguyen
Browse files

igc: Add Receive Descriptor Minimum Threshold Count to clear HW counters 



The statistics of this register are being tracked, however, the register
was inadvertently missed when implementing igc_clear_hw_cntrs_base().
The register is clear on read, so add it to the function so that the
register is cleared when requested so the tracked count is accurate.

Signed-off-by: default avatarSasha Neftin <sasha.neftin@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent d9f0c8e4

drivers/net/ethernet/intel/igc/igc_mac.c

+1 −0
Original line number Diff line number Diff line
@@ -308,6 +308,7 @@ void igc_clear_hw_cntrs_base(struct igc_hw *hw) 
	rd32(IGC_TLPIC);

	rd32(IGC_RLPIC);

	rd32(IGC_HGPTC);

	rd32(IGC_RXDMTC);

	rd32(IGC_HGORCL);

	rd32(IGC_HGORCH);

	rd32(IGC_HGOTCL);

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