Commit 60e76bb8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'm68knommu-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu 

Pull m68knommu updates from Greg Ungerer:
 "Fixes include:

   - cleanup compiler warnings (IO access functions and unused
     variables)

   - ColdFire v3 cache control fix

   - ColdFire MMU comment cleanup

   - switch to using asm-generic cmpxchg_local()

   - stmark platform updates"

* tag 'm68knommu-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
  m68k: stmark2: enable edma support for dspi
  m68k: use asm-generic cmpxchg_local()
  m68k: mcfmmu: remove stale part of comment about steal_context
  m68knommu: fix overwriting of bits in ColdFire V3 cache control
  m68k: fix ColdFire mmu init compile warning
  m68knommu: fix use of cpu_to_le() on IO access
  m68knommu: __force type casts for raw IO access
  m68k: stmark2: defconfig updates
parents dbf83817 fde87ebf

arch/m68k/coldfire/stmark2.c

+5 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <linux/spi/spi.h>

#include <linux/spi/spi-fsl-dspi.h>

#include <linux/spi/flash.h>

#include <linux/dma-mapping.h>

#include <asm/mcfsim.h>



/*
@@ -78,6 +79,8 @@ static struct resource dspi_spi0_resource[] = { 
	},

};



static u64 stmark2_dspi_mask = DMA_BIT_MASK(32);



/* SPI controller, id = bus number */

static struct platform_device dspi_spi0_device = {

	.name = "fsl-dspi",
@@ -86,6 +89,8 @@ static struct platform_device dspi_spi0_device = { 
	.resource = dspi_spi0_resource,

	.dev = {

		.platform_data = &dspi_spi0_info,

		.dma_mask = &stmark2_dspi_mask,

		.coherent_dma_mask = DMA_BIT_MASK(32),

	},

};

arch/m68k/configs/stmark2_defconfig

+27 −20
Original line number Diff line number Diff line 
CONFIG_LOCALVERSION="stmark2-001"

CONFIG_DEFAULT_HOSTNAME="stmark2"

CONFIG_SYSVIPC=y

# CONFIG_FHANDLE is not set

CONFIG_LOG_BUF_SHIFT=14

CONFIG_NAMESPACES=y

CONFIG_BLK_DEV_INITRD=y

# CONFIG_RD_BZIP2 is not set

# CONFIG_RD_LZMA is not set

# CONFIG_RD_XZ is not set

# CONFIG_RD_LZO is not set

# CONFIG_RD_LZ4 is not set

CONFIG_CC_OPTIMIZE_FOR_SIZE=y

# CONFIG_FHANDLE is not set

# CONFIG_AIO is not set

# CONFIG_ADVISE_SYSCALLS is not set

# CONFIG_MEMBARRIER is not set

CONFIG_EMBEDDED=y

# CONFIG_VM_EVENT_COUNTERS is not set

# CONFIG_COMPAT_BRK is not set

# CONFIG_BLK_DEV_BSG is not set

CONFIG_BLK_CMDLINE_PARSER=y

# CONFIG_MMU is not set

CONFIG_COLDFIRE=y

CONFIG_M5441x=y

CONFIG_CLOCK_FREQ=240000000

CONFIG_STMARK2=y

CONFIG_UBOOT=y

CONFIG_RAMBASE=0x40000000

CONFIG_RAMSIZE=0x8000000

CONFIG_VECTORBASE=0x40000000

CONFIG_KERNELBASE=0x40001000

# CONFIG_BLK_DEV_BSG is not set

CONFIG_BLK_CMDLINE_PARSER=y

CONFIG_BINFMT_FLAT=y

CONFIG_BINFMT_ZFLAT=y

CONFIG_BINFMT_MISC=y

# CONFIG_UEVENT_HELPER is not set

CONFIG_DEVTMPFS=y

CONFIG_DEVTMPFS_MOUNT=y

CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y

# CONFIG_ALLOW_DEV_COREDUMP is not set

CONFIG_MTD=y

CONFIG_MTD_CMDLINE_PARTS=y
@@ -65,24 +60,36 @@ CONFIG_DEBUG_GPIO=y 
CONFIG_GPIO_SYSFS=y

CONFIG_GPIO_GENERIC_PLATFORM=y

# CONFIG_HWMON is not set

# CONFIG_RC_CORE is not set

# CONFIG_HID is not set

# CONFIG_USB_SUPPORT is not set

CONFIG_MMC=y

CONFIG_MMC_DEBUG=y

CONFIG_MMC_SDHCI=y

CONFIG_MMC_SDHCI_PLTFM=y

CONFIG_MMC_SDHCI_ESDHC_MCF=y

CONFIG_DMADEVICES=y

CONFIG_MCF_EDMA=y

CONFIG_EXT2_FS=y

CONFIG_EXT2_FS_XATTR=y

CONFIG_EXT2_FS_POSIX_ACL=y

CONFIG_EXT2_FS_SECURITY=y

CONFIG_EXT3_FS=y

CONFIG_EXT3_FS_POSIX_ACL=y

CONFIG_EXT3_FS_SECURITY=y

# CONFIG_FILE_LOCKING is not set

# CONFIG_DNOTIFY is not set

# CONFIG_INOTIFY_USER is not set

CONFIG_OVERLAY_FS=y

CONFIG_FSCACHE=y

# CONFIG_PROC_SYSCTL is not set

CONFIG_CRAMFS=y

CONFIG_SQUASHFS=y

CONFIG_ROMFS_FS=y

CONFIG_CRYPTO_ANSI_CPRNG=y

# CONFIG_CRYPTO_HW is not set

CONFIG_PRINTK_TIME=y

# CONFIG_DEBUG_BUGVERBOSE is not set

# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set

CONFIG_SLUB_DEBUG_ON=y

CONFIG_PANIC_ON_OOPS=y

# CONFIG_SCHED_DEBUG is not set
 
# CONFIG_DEBUG_BUGVERBOSE is not set

CONFIG_BOOTPARAM=y

CONFIG_BOOTPARAM_STRING="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit=/bin/init devtmpfs.mount=1"

CONFIG_CRYPTO=y

# CONFIG_CRYPTO_ECHAINIV is not set

CONFIG_CRYPTO_ANSI_CPRNG=y

# CONFIG_CRYPTO_HW is not set

CONFIG_CRC16=y

arch/m68k/include/asm/cmpxchg.h

+0 −8
Original line number Diff line number Diff line
@@ -129,14 +129,6 @@ static inline unsigned long __cmpxchg(volatile void *p, unsigned long old, 


#else



/*

 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make

 * them available.

 */

#define cmpxchg_local(ptr, o, n)				  	       \

	((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\

			(unsigned long)(n), sizeof(*(ptr))))



#include <asm-generic/cmpxchg.h>



#endif

arch/m68k/include/asm/io_no.h

+10 −10
Original line number Diff line number Diff line
@@ -14,15 +14,15 @@ 
 * that behavior here first before we include asm-generic/io.h.

 */

#define __raw_readb(addr) \

    ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })

    ({ u8 __v = (*(__force volatile u8 *) (addr)); __v; })

#define __raw_readw(addr) \

    ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })

    ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })

#define __raw_readl(addr) \

    ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })

    ({ u32 __v = (*(__force volatile u32 *) (addr)); __v; })



#define __raw_writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))

#define __raw_writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))

#define __raw_writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))

#define __raw_writeb(b, addr) (void)((*(__force volatile u8 *) (addr)) = (b))

#define __raw_writew(b, addr) (void)((*(__force volatile u16 *) (addr)) = (b))

#define __raw_writel(b, addr) (void)((*(__force volatile u32 *) (addr)) = (b))



#if defined(CONFIG_COLDFIRE)

/*
@@ -67,7 +67,7 @@ static inline u16 readw(const volatile void __iomem *addr) 
{

	if (cf_internalio(addr))

		return __raw_readw(addr);

	return __le16_to_cpu(__raw_readw(addr));

	return swab16(__raw_readw(addr));

}



#define readl readl
@@ -75,7 +75,7 @@ static inline u32 readl(const volatile void __iomem *addr) 
{

	if (cf_internalio(addr))

		return __raw_readl(addr);

	return __le32_to_cpu(__raw_readl(addr));

	return swab32(__raw_readl(addr));

}



#define writew writew
@@ -84,7 +84,7 @@ static inline void writew(u16 value, volatile void __iomem *addr) 
	if (cf_internalio(addr))

		__raw_writew(value, addr);

	else

		__raw_writew(__cpu_to_le16(value), addr);

		__raw_writew(swab16(value), addr);

}



#define writel writel
@@ -93,7 +93,7 @@ static inline void writel(u32 value, volatile void __iomem *addr) 
	if (cf_internalio(addr))

		__raw_writel(value, addr);

	else

		__raw_writel(__cpu_to_le32(value), addr);

		__raw_writel(swab32(value), addr);

}



#else

arch/m68k/include/asm/m53xxacr.h

+3 −3
Original line number Diff line number Diff line
@@ -89,9 +89,9 @@ 
 * coherency though in all cases. And for copyback caches we will need

 * to push cached data as well.

 */

#define CACHE_INIT	  CACR_CINVA

#define CACHE_INVALIDATE  CACR_CINVA

#define CACHE_INVALIDATED CACR_CINVA

#define CACHE_INIT        (CACHE_MODE + CACR_CINVA - CACR_EC)

#define CACHE_INVALIDATE  (CACHE_MODE + CACR_CINVA)

#define CACHE_INVALIDATED (CACHE_MODE + CACR_CINVA)



#define ACR0_MODE	((CONFIG_RAMBASE & 0xff000000) + \

			 (0x000f0000) + \

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