Commit 60c906ba authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull RAS updates from Ingo Molnar:
 "The main changes in this cycle were:

  - Assign notifier chain priorities for all RAS related handlers to
    make the ordering explicit (Borislav Petkov)

  - Improve the AMD MCA banks sysfs output (Yazen Ghannam)

  - Various cleanups and restructuring of the x86 RAS code (Borislav
    Petkov)"

* 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/ras, EDAC, acpi: Assign MCE notifier handlers a priority
  x86/ras: Get rid of mce_process_work()
  EDAC/mce/amd: Dump TSC value
  EDAC/mce/amd: Unexport amd_decode_mce()
  x86/ras/amd/inj: Change dependency
  x86/ras: Flip the TSC-adding logic
  x86/ras/amd: Make sysfs names of banks more user-friendly
  x86/ras/therm_throt: Do not log a fake MCE for thermal events
  x86/ras/inject: Make it depend on X86_LOCAL_APIC=y
parents 7f4eb0a6 9026cc82

arch/x86/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -1070,7 +1070,7 @@ config X86_MCE_THRESHOLD 
	def_bool y



config X86_MCE_INJECT

	depends on X86_MCE

	depends on X86_MCE && X86_LOCAL_APIC

	tristate "Machine check injector support"

	---help---

	  Provide support for injecting machine checks for testing purposes.

arch/x86/include/asm/mce.h

+12 −8
Original line number Diff line number Diff line
@@ -97,10 +97,6 @@ 


#define MCE_OVERFLOW 0		/* bit 0 in flags means overflow */



/* Software defined banks */

#define MCE_EXTENDED_BANK	128

#define MCE_THERMAL_BANK	(MCE_EXTENDED_BANK + 0)



#define MCE_LOG_LEN 32

#define MCE_LOG_SIGNATURE	"MACHINECHECK"
@@ -193,6 +189,15 @@ extern struct mce_vendor_flags mce_flags; 


extern struct mca_config mca_cfg;

extern struct mca_msr_regs msr_ops;



enum mce_notifier_prios {

	MCE_PRIO_SRAO		= INT_MAX,

	MCE_PRIO_EXTLOG		= INT_MAX - 1,

	MCE_PRIO_NFIT		= INT_MAX - 2,

	MCE_PRIO_EDAC		= INT_MAX - 3,

	MCE_PRIO_LOWEST		= 0,

};



extern void mce_register_decode_chain(struct notifier_block *nb);

extern void mce_unregister_decode_chain(struct notifier_block *nb);
@@ -306,8 +311,6 @@ extern void (*deferred_error_int_vector)(void); 


void intel_init_thermal(struct cpuinfo_x86 *c);



void mce_log_therm_throt_event(__u64 status);



/* Interrupt Handler for core thermal thresholds */

extern int (*platform_thermal_notify)(__u64 msr_val);
@@ -362,12 +365,13 @@ struct smca_hwid { 
	unsigned int bank_type;	/* Use with smca_bank_types for easy indexing. */

	u32 hwid_mcatype;	/* (hwid,mcatype) tuple */

	u32 xec_bitmap;		/* Bitmap of valid ExtErrorCodes; current max is 21. */

	u8 count;		/* Number of instances. */

};



struct smca_bank {

	struct smca_hwid *hwid;

	/* Instance ID */

	u32 id;

	u32 id;			/* Value of MCA_IPID[InstanceId]. */

	u8 sysfs_id;		/* Value used for sysfs name. */

};



extern struct smca_bank smca_banks[MAX_NR_BANKS];

arch/x86/kernel/cpu/mcheck/mce-apei.c

+4 −1
Original line number Diff line number Diff line
@@ -52,8 +52,11 @@ void apei_mce_report_mem_error(int severity, struct cper_sec_mem_err *mem_err) 


	if (severity >= GHES_SEV_RECOVERABLE)

		m.status |= MCI_STATUS_UC;

	if (severity >= GHES_SEV_PANIC)



	if (severity >= GHES_SEV_PANIC) {

		m.status |= MCI_STATUS_PCC;

		m.tsc = rdtsc();

	}



	m.addr = mem_err->physical_addr;

	mce_log(&m);

arch/x86/kernel/cpu/mcheck/mce-genpool.c

+1 −1
Original line number Diff line number Diff line
@@ -72,7 +72,7 @@ struct llist_node *mce_gen_pool_prepare_records(void) 
	return new_head.first;

}



void mce_gen_pool_process(void)

void mce_gen_pool_process(struct work_struct *__unused)

{

	struct llist_node *head;

	struct mce_evt_llist *node, *tmp;

arch/x86/kernel/cpu/mcheck/mce-inject.c

+1 −4
Original line number Diff line number Diff line
@@ -152,7 +152,6 @@ static void raise_mce(struct mce *m) 
	if (context == MCJ_CTX_RANDOM)

		return;



#ifdef CONFIG_X86_LOCAL_APIC

	if (m->inject_flags & (MCJ_IRQ_BROADCAST | MCJ_NMI_BROADCAST)) {

		unsigned long start;

		int cpu;
@@ -192,9 +191,7 @@ static void raise_mce(struct mce *m) 
		raise_local();

		put_cpu();

		put_online_cpus();

	} else

#endif

	{

	} else {

		preempt_disable();

		raise_local();

		preempt_enable();

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