Commit 60a5317f authored by Tejun Heo's avatar Tejun Heo Committed by Ingo Molnar
Browse files

x86: implement x86_32 stack protector 



Impact: stack protector for x86_32

Implement stack protector for x86_32.  GDT entry 28 is used for it.
It's set to point to stack_canary-20 and have the length of 24 bytes.
CONFIG_CC_STACKPROTECTOR turns off CONFIG_X86_32_LAZY_GS and sets %gs
to the stack canary segment on entry.  As %gs is otherwise unused by
the kernel, the canary can be anywhere.  It's defined as a percpu
variable.

x86_32 exception handlers take register frame on stack directly as
struct pt_regs.  With -fstack-protector turned on, gcc copies the
whole structure after the stack canary and (of course) doesn't copy
back on return thus losing all changed.  For now, -fno-stack-protector
is added to all files which contain those functions.  We definitely
need something better.

Signed-off-by: default avatarTejun Heo <tj@kernel.org>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent ccbeed3a

arch/x86/Kconfig

+1 −2
Original line number Diff line number Diff line
@@ -209,7 +209,7 @@ config X86_TRAMPOLINE 


config X86_32_LAZY_GS

	def_bool y

	depends on X86_32

	depends on X86_32 && !CC_STACKPROTECTOR



config KTIME_SCALAR

	def_bool X86_32
@@ -1356,7 +1356,6 @@ config CC_STACKPROTECTOR_ALL 


config CC_STACKPROTECTOR

	bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"

	depends on X86_64

	select CC_STACKPROTECTOR_ALL

	help

          This option turns on the -fstack-protector GCC feature. This

arch/x86/include/asm/processor.h

+4 −0
Original line number Diff line number Diff line
@@ -396,7 +396,11 @@ DECLARE_PER_CPU(union irq_stack_union, irq_stack_union); 
DECLARE_INIT_PER_CPU(irq_stack_union);



DECLARE_PER_CPU(char *, irq_stack_ptr);

#else	/* X86_64 */

#ifdef CONFIG_CC_STACKPROTECTOR

DECLARE_PER_CPU(unsigned long, stack_canary);

#endif

#endif	/* X86_64 */



extern void print_cpu_info(struct cpuinfo_x86 *);

extern unsigned int xstate_size;

arch/x86/include/asm/segment.h

+8 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ 
 *

 *  26 - ESPFIX small SS

 *  27 - per-cpu			[ offset to per-cpu data area ]

 *  28 - unused

 *  28 - stack_canary-20		[ for stack protector ]

 *  29 - unused

 *  30 - unused

 *  31 - TSS for double fault handler
@@ -95,6 +95,13 @@ 
#define __KERNEL_PERCPU 0

#endif



#define GDT_ENTRY_STACK_CANARY		(GDT_ENTRY_KERNEL_BASE + 16)

#ifdef CONFIG_CC_STACKPROTECTOR

#define __KERNEL_STACK_CANARY		(GDT_ENTRY_STACK_CANARY * 8)

#else

#define __KERNEL_STACK_CANARY		0

#endif



#define GDT_ENTRY_DOUBLEFAULT_TSS	31



/*

arch/x86/include/asm/stackprotector.h

+86 −5
Original line number Diff line number Diff line 
/*

 * GCC stack protector support.

 *

 * Stack protector works by putting predefined pattern at the start of

 * the stack frame and verifying that it hasn't been overwritten when

 * returning from the function.  The pattern is called stack canary

 * and unfortunately gcc requires it to be at a fixed offset from %gs.

 * On x86_64, the offset is 40 bytes and on x86_32 20 bytes.  x86_64

 * and x86_32 use segment registers differently and thus handles this

 * requirement differently.

 *

 * On x86_64, %gs is shared by percpu area and stack canary.  All

 * percpu symbols are zero based and %gs points to the base of percpu

 * area.  The first occupant of the percpu area is always

 * irq_stack_union which contains stack_canary at offset 40.  Userland

 * %gs is always saved and restored on kernel entry and exit using

 * swapgs, so stack protector doesn't add any complexity there.

 *

 * On x86_32, it's slightly more complicated.  As in x86_64, %gs is

 * used for userland TLS.  Unfortunately, some processors are much

 * slower at loading segment registers with different value when

 * entering and leaving the kernel, so the kernel uses %fs for percpu

 * area and manages %gs lazily so that %gs is switched only when

 * necessary, usually during task switch.

 *

 * As gcc requires the stack canary at %gs:20, %gs can't be managed

 * lazily if stack protector is enabled, so the kernel saves and

 * restores userland %gs on kernel entry and exit.  This behavior is

 * controlled by CONFIG_X86_32_LAZY_GS and accessors are defined in

 * system.h to hide the details.

 */



#ifndef _ASM_STACKPROTECTOR_H

#define _ASM_STACKPROTECTOR_H 1
@@ -6,8 +38,18 @@ 
#include <asm/tsc.h>

#include <asm/processor.h>

#include <asm/percpu.h>

#include <asm/system.h>

#include <asm/desc.h>

#include <linux/random.h>



/*

 * 24 byte read-only segment initializer for stack canary.  Linker

 * can't handle the address bit shifting.  Address will be set in

 * head_32 for boot CPU and setup_per_cpu_areas() for others.

 */

#define GDT_STACK_CANARY_INIT						\

	[GDT_ENTRY_STACK_CANARY] = { { { 0x00000018, 0x00409000 } } },



/*

 * Initialize the stackprotector canary value.

 *
@@ -19,12 +61,9 @@ static __always_inline void boot_init_stack_canary(void) 
	u64 canary;

	u64 tsc;



	/*

	 * Build time only check to make sure the stack_canary is at

	 * offset 40 in the pda; this is a gcc ABI requirement

	 */

#ifdef CONFIG_X86_64

	BUILD_BUG_ON(offsetof(union irq_stack_union, stack_canary) != 40);



#endif

	/*

	 * We both use the random pool and the current TSC as a source

	 * of randomness. The TSC only matters for very early init,
@@ -36,7 +75,49 @@ static __always_inline void boot_init_stack_canary(void) 
	canary += tsc + (tsc << 32UL);



	current->stack_canary = canary;

#ifdef CONFIG_X86_64

	percpu_write(irq_stack_union.stack_canary, canary);

#else

	percpu_write(stack_canary, canary);

#endif

}



static inline void setup_stack_canary_segment(int cpu)

{

#ifdef CONFIG_X86_32

	unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu);

	struct desc_struct *gdt_table = get_cpu_gdt_table(cpu);

	struct desc_struct desc;



	desc = gdt_table[GDT_ENTRY_STACK_CANARY];

	desc.base0 = canary & 0xffff;

	desc.base1 = (canary >> 16) & 0xff;

	desc.base2 = (canary >> 24) & 0xff;

	write_gdt_entry(gdt_table, GDT_ENTRY_STACK_CANARY, &desc, DESCTYPE_S);

#endif

}



static inline void load_stack_canary_segment(void)

{

#ifdef CONFIG_X86_32

	asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory");

#endif

}



#else	/* CC_STACKPROTECTOR */



#define GDT_STACK_CANARY_INIT



/* dummy boot_init_stack_canary() is defined in linux/stackprotector.h */



static inline void setup_stack_canary_segment(int cpu)

{ }



static inline void load_stack_canary_segment(void)

{

#ifdef CONFIG_X86_32

	asm volatile ("mov %0, %%gs" : : "r" (0));

#endif

}



#endif	/* CC_STACKPROTECTOR */

arch/x86/include/asm/system.h

+21 −0
Original line number Diff line number Diff line
@@ -23,6 +23,22 @@ struct task_struct *__switch_to(struct task_struct *prev, 


#ifdef CONFIG_X86_32



#ifdef CONFIG_CC_STACKPROTECTOR

#define __switch_canary							\

	"movl "__percpu_arg([current_task])",%%ebx\n\t"			\

	"movl %P[task_canary](%%ebx),%%ebx\n\t"				\

	"movl %%ebx,"__percpu_arg([stack_canary])"\n\t"

#define __switch_canary_oparam						\

	, [stack_canary] "=m" (per_cpu_var(stack_canary))

#define __switch_canary_iparam						\

	, [current_task] "m" (per_cpu_var(current_task))		\

	, [task_canary] "i" (offsetof(struct task_struct, stack_canary))

#else	/* CC_STACKPROTECTOR */

#define __switch_canary

#define __switch_canary_oparam

#define __switch_canary_iparam

#endif	/* CC_STACKPROTECTOR */



/*

 * Saving eflags is important. It switches not only IOPL between tasks,

 * it also protects other tasks from NT leaking through sysenter etc.
@@ -46,6 +62,7 @@ do { \ 
		     "pushl %[next_ip]\n\t"	/* restore EIP   */	\

		     "jmp __switch_to\n"	/* regparm call  */	\

		     "1:\t"						\

		     __switch_canary					\

		     "popl %%ebp\n\t"		/* restore EBP   */	\

		     "popfl\n"			/* restore flags */	\

									\
@@ -58,6 +75,8 @@ do { \ 
		       "=b" (ebx), "=c" (ecx), "=d" (edx),		\

		       "=S" (esi), "=D" (edi)				\

		       							\

		       __switch_canary_oparam				\

									\

		       /* input parameters: */				\

		     : [next_sp]  "m" (next->thread.sp),		\

		       [next_ip]  "m" (next->thread.ip),		\
@@ -66,6 +85,8 @@ do { \ 
		       [prev]     "a" (prev),				\

		       [next]     "d" (next)				\

									\

		       __switch_canary_iparam				\

									\

		     : /* reloaded segment registers */			\

			"memory");					\

} while (0)

CRA Git | Maintained and supported by SUSTech CRA and CCSE