Commit 600da64b authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'sunxi-fixes-for-4.7' of...

Merge tag 'sunxi-fixes-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes

Pull "Allwinner Fixes for 4.7" from Maxime Ripard:

Two patches fixing simplefb on the SoCs that had their display clocks
enabled, and one fix for the CHIP that will enable its sched clock.

* tag 'sunxi-fixes-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  ARM: dts: sun7i: Fix pll3x2 and pll7x2 not having a parent clock
  ARM: dts: sunxi: Add pll3 to simplefb nodes clocks lists
  ARM: sunxi/dt: make the CHIP inherit from allwinner,sun5i-a13
parents ed749a53 eee25ab1
Loading
Loading
Loading
Loading
+12 −9
Original line number Diff line number Diff line
@@ -65,8 +65,9 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0-hdmi";
			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
				 <&ahb_gates 44>, <&dram_gates 26>;
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
				 <&ahb_gates 43>, <&ahb_gates 44>,
				 <&dram_gates 26>;
			status = "disabled";
		};

@@ -74,8 +75,9 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
				 <&ahb_gates 44>, <&ahb_gates 46>,
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
				 <&ahb_gates 43>, <&ahb_gates 44>,
				 <&ahb_gates 46>,
				 <&dram_gates 25>, <&dram_gates 26>;
			status = "disabled";
		};
@@ -84,9 +86,9 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_fe0-de_be0-lcd0";
			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
				 <&ahb_gates 46>, <&dram_gates 25>,
				 <&dram_gates 26>;
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
				 <&ahb_gates 44>, <&ahb_gates 46>,
				 <&dram_gates 25>, <&dram_gates 26>;
			status = "disabled";
		};

@@ -94,8 +96,9 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
			clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
				 <&ahb_gates 44>, <&ahb_gates 46>,
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
				 <&ahb_gates 36>, <&ahb_gates 44>,
				 <&ahb_gates 46>,
				 <&dram_gates 5>, <&dram_gates 25>, <&dram_gates 26>;
			status = "disabled";
		};
+6 −5
Original line number Diff line number Diff line
@@ -65,8 +65,8 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0-hdmi";
			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
				 <&ahb_gates 44>;
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
				 <&ahb_gates 43>, <&ahb_gates 44>;
			status = "disabled";
		};

@@ -74,7 +74,8 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0";
			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
				 <&ahb_gates 44>;
			status = "disabled";
		};

@@ -82,8 +83,8 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0-tve0";
			clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
				 <&ahb_gates 44>;
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
				 <&ahb_gates 36>, <&ahb_gates 44>;
			status = "disabled";
		};
	};
+1 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@

/ {
	model = "NextThing C.H.I.P.";
	compatible = "nextthing,chip", "allwinner,sun5i-r8";
	compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13";

	aliases {
		i2c0 = &i2c0;
+8 −5
Original line number Diff line number Diff line
@@ -67,8 +67,9 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0-hdmi";
			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
				 <&ahb_gates 44>, <&dram_gates 26>;
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
				 <&ahb_gates 43>, <&ahb_gates 44>,
				 <&dram_gates 26>;
			status = "disabled";
		};

@@ -76,8 +77,8 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0";
			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
				 <&dram_gates 26>;
			clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
				 <&ahb_gates 44>, <&dram_gates 26>;
			status = "disabled";
		};

@@ -85,7 +86,7 @@
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0-tve0";
			clocks = <&pll5 1>,
			clocks = <&pll3>, <&pll5 1>,
				 <&ahb_gates 34>, <&ahb_gates 36>, <&ahb_gates 44>,
				 <&dram_gates 5>, <&dram_gates 26>;
			status = "disabled";
@@ -231,6 +232,7 @@
		pll3x2: pll3x2_clk {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&pll3>;
			clock-div = <1>;
			clock-mult = <2>;
			clock-output-names = "pll3-2x";
@@ -272,6 +274,7 @@
		pll7x2: pll7x2_clk {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&pll7>;
			clock-div = <1>;
			clock-mult = <2>;
			clock-output-names = "pll7-2x";